From 2f74512a09aad5bc678081dda5916d4f72ffe3e5 Mon Sep 17 00:00:00 2001 From: Srikar Srimath Tirumala Date: Thu, 22 Dec 2016 15:09:06 -0800 Subject: gpu: nvgpu: use gm20b.gbus instead of gpcclk DVFS constraints for GPU are applied on gbus not on gpcclk. Make T210 K4.4 use gm20b.gbus to change the GPU clk rates and use its parent clock gbus while querrying DVFS constraints for the GPU. Bug 200233943 Change-Id: I2bad3266d6b8f8f3806a0d4249d9b40308c2ee6a Signed-off-by: Srikar Srimath Tirumala Reviewed-on: http://git-master/r/1275926 Reviewed-by: mobile promotions Tested-by: mobile promotions --- drivers/gpu/nvgpu/gm20b/clk_gm20b.c | 3 --- 1 file changed, 3 deletions(-) (limited to 'drivers/gpu/nvgpu/gm20b/clk_gm20b.c') diff --git a/drivers/gpu/nvgpu/gm20b/clk_gm20b.c b/drivers/gpu/nvgpu/gm20b/clk_gm20b.c index 4f63f956..8db4944e 100644 --- a/drivers/gpu/nvgpu/gm20b/clk_gm20b.c +++ b/drivers/gpu/nvgpu/gm20b/clk_gm20b.c @@ -378,9 +378,7 @@ static void clk_config_dvfs(struct gk20a *g, struct pll *gpll) struct clk* clk; clk = g->clk.tegra_clk; -#ifdef CONFIG_TEGRA_CLK_FRAMEWORK clk = clk_get_parent(clk); -#endif d->mv = tegra_dvfs_predict_mv_at_hz_cur_tfloor(clk, rate_gpc2clk_to_gpu(gpll->freq)); @@ -1324,7 +1322,6 @@ int gm20b_register_gpcclk(struct gk20a *g) { } clk->g = g; - clk->tegra_clk = c; clk_register_clkdev(c, "gpcclk", "gpcclk"); return err; -- cgit v1.2.2