From 2a95a288b285b0eff16a8825298c416d185693fb Mon Sep 17 00:00:00 2001 From: Terje Bergstrom Date: Tue, 20 Dec 2016 15:14:16 -0800 Subject: gpu: nvgpu: Check reference clock before use We use GPU reference clock as a divider. Check before division that reference clock is not zero. Change-Id: Ie453a78b422b2e740daeb7c12ce5b06faa52ba76 Signed-off-by: Terje Bergstrom Reviewed-on: http://git-master/r/1275743 GVS: Gerrit_Virtual_Submit Reviewed-by: Thomas Fleury --- drivers/gpu/nvgpu/gm20b/clk_gm20b.c | 5 +++++ 1 file changed, 5 insertions(+) (limited to 'drivers/gpu/nvgpu/gm20b/clk_gm20b.c') diff --git a/drivers/gpu/nvgpu/gm20b/clk_gm20b.c b/drivers/gpu/nvgpu/gm20b/clk_gm20b.c index 906e805a..3fa5c1d3 100644 --- a/drivers/gpu/nvgpu/gm20b/clk_gm20b.c +++ b/drivers/gpu/nvgpu/gm20b/clk_gm20b.c @@ -1158,6 +1158,11 @@ static int gm20b_init_gpc_pll(struct gk20a *g) clk->gpc_pll.id = GK20A_GPC_PLL; clk->gpc_pll.clk_in = clk_get_rate(ref) / KHZ; + if (clk->gpc_pll.clk_in == 0) { + gk20a_err(dev_from_gk20a(g), + "GPCPLL reference clock is zero"); + return -EINVAL; + } gm20b_calc_dvfs_safe_max_freq(c); clk->gpc_pll.PL = (dvfs_safe_max_freq == 0) ? 0 : -- cgit v1.2.2