From f56d50ddac2ea70c7d50f22b9cd74408b1042da3 Mon Sep 17 00:00:00 2001 From: Vijayakumar Date: Wed, 8 Oct 2014 20:07:37 +0530 Subject: gpu:nvgpu:gm20b: disable irqs when hs pmu executes bug 200040021 polling halt irq to check for hs bin completion keep irqs disabled to avoid executing irq handler Change-Id: Ic245d89580444dcbf1cf5ec34bfe0f8b0c5bbc0f Signed-off-by: Vijayakumar Reviewed-on: http://git-master/r/554659 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Terje Bergstrom --- drivers/gpu/nvgpu/gm20b/acr_gm20b.h | 1 + 1 file changed, 1 insertion(+) (limited to 'drivers/gpu/nvgpu/gm20b/acr_gm20b.h') diff --git a/drivers/gpu/nvgpu/gm20b/acr_gm20b.h b/drivers/gpu/nvgpu/gm20b/acr_gm20b.h index d1c42e46..5dddc0b2 100644 --- a/drivers/gpu/nvgpu/gm20b/acr_gm20b.h +++ b/drivers/gpu/nvgpu/gm20b/acr_gm20b.h @@ -383,4 +383,5 @@ int gm20b_bootstrap_hs_flcn(struct gk20a *g); int gm20b_pmu_setup_sw(struct gk20a *g); int pmu_exec_gen_bl(struct gk20a *g, void *desc, u8 b_wait_for_halt); int pmu_wait_for_halt(struct gk20a *g, unsigned int timeout_us); +int clear_halt_interrupt_status(struct gk20a *g, unsigned int timeout); #endif /*__ACR_GM20B_H_*/ -- cgit v1.2.2