From 2d71d633cf754e15c5667215c44086080c7c328d Mon Sep 17 00:00:00 2001 From: Terje Bergstrom Date: Wed, 12 Nov 2014 14:22:35 +0200 Subject: gpu: nvgpu: Physical page bits to be per chip Retrieve number of physical page bits based on chip. Bug 1567274 Change-Id: I5a0f6a66be37f2cf720d66b5bdb2b704cd992234 Signed-off-by: Terje Bergstrom Reviewed-on: http://git-master/r/601700 --- drivers/gpu/nvgpu/gm20b/acr_gm20b.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) (limited to 'drivers/gpu/nvgpu/gm20b/acr_gm20b.c') diff --git a/drivers/gpu/nvgpu/gm20b/acr_gm20b.c b/drivers/gpu/nvgpu/gm20b/acr_gm20b.c index 470a93bc..cb874a48 100644 --- a/drivers/gpu/nvgpu/gm20b/acr_gm20b.c +++ b/drivers/gpu/nvgpu/gm20b/acr_gm20b.c @@ -258,7 +258,8 @@ int prepare_ucode_blob(struct gk20a *g) gm20b_dbg_pmu("managed LS falcon %d, WPR size %d bytes.\n", plsfm->managed_flcn_cnt, plsfm->wpr_size); lsfm_init_wpr_contents(g, plsfm, nonwpr_addr); - g->acr.ucode_blob_start = NV_MC_SMMU_VADDR_TRANSLATE(iova); + g->acr.ucode_blob_start = + gk20a_mm_smmu_vaddr_translate(g, iova); g->acr.ucode_blob_size = plsfm->wpr_size; gm20b_dbg_pmu("base reg carveout 2:%x\n", readl(mc + MC_SECURITY_CARVEOUT2_BOM_0)); -- cgit v1.2.2