From d465504534b2ec7ab0be190fc98b24e1b77634e2 Mon Sep 17 00:00:00 2001 From: Mahantesh Kumbar Date: Tue, 14 Feb 2017 12:52:20 +0530 Subject: gpu: nvgpu: Remove PMU gm204/gm206 support -Created new methods for PMU gp106 whichever dependent on gm206. -Deleted pmu_gm206.c/h files & removed its involvement from dependent files. Change-Id: Ic578da53bff362efb3e142962275227787206233 Signed-off-by: Mahantesh Kumbar Reviewed-on: http://git-master/r/1304492 Reviewed-by: svccoveritychecker GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom --- drivers/gpu/nvgpu/gm206/hal_gm206.c | 4 +- drivers/gpu/nvgpu/gm206/pmu_gm206.c | 174 ------------------------------------ drivers/gpu/nvgpu/gm206/pmu_gm206.h | 22 ----- 3 files changed, 1 insertion(+), 199 deletions(-) delete mode 100644 drivers/gpu/nvgpu/gm206/pmu_gm206.c delete mode 100644 drivers/gpu/nvgpu/gm206/pmu_gm206.h (limited to 'drivers/gpu/nvgpu/gm206') diff --git a/drivers/gpu/nvgpu/gm206/hal_gm206.c b/drivers/gpu/nvgpu/gm206/hal_gm206.c index 6ecbbfed..d6c73b53 100644 --- a/drivers/gpu/nvgpu/gm206/hal_gm206.c +++ b/drivers/gpu/nvgpu/gm206/hal_gm206.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2016, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2016-2017, NVIDIA CORPORATION. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms and conditions of the GNU General Public License, @@ -37,7 +37,6 @@ #include "gm20b/clk_gm20b.h" #include "gm20b/debug_gm20b.h" #include "gm206/mm_gm206.h" -#include "gm206/pmu_gm206.h" #include "gm206/acr_gm206.h" #include @@ -190,7 +189,6 @@ int gm206_init_hal(struct gk20a *g) gm206_init_ce(gops); gm20b_init_gr_ctx(gops); gm206_init_mm(gops); - gm206_init_pmu_ops(gops); gm20b_init_clk_ops(gops); gm20b_init_regops(gops); gm20b_init_debug_ops(gops); diff --git a/drivers/gpu/nvgpu/gm206/pmu_gm206.c b/drivers/gpu/nvgpu/gm206/pmu_gm206.c deleted file mode 100644 index ffcf0bf1..00000000 --- a/drivers/gpu/nvgpu/gm206/pmu_gm206.c +++ /dev/null @@ -1,174 +0,0 @@ -/* - * Copyright (c) 2016-2017, NVIDIA CORPORATION. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - */ - -#include - -#include "gk20a/gk20a.h" -#include "gk20a/pmu_gk20a.h" -#include "gk20a/pmu_gk20a.h" -#include "gm20b/acr_gm20b.h" -#include "gm206/acr_gm206.h" -#include "gm20b/pmu_gm20b.h" -#include "gm206/pmu_gm206.h" - -#include -#include - -#define gm206_dbg_pmu(fmt, arg...) \ - gk20a_dbg(gpu_dbg_pmu, fmt, ##arg) - -bool gm206_is_lazy_bootstrap(u32 falcon_id) -{ - bool enable_status = false; - - switch (falcon_id) { - case LSF_FALCON_ID_FECS: - enable_status = true; - break; - case LSF_FALCON_ID_GPCCS: - enable_status = true; - break; - default: - break; - } - - return enable_status; -} - -bool gm206_is_priv_load(u32 falcon_id) -{ - bool enable_status = false; - - switch (falcon_id) { - case LSF_FALCON_ID_FECS: - enable_status = true; - break; - case LSF_FALCON_ID_GPCCS: - enable_status = true; - break; - default: - break; - } - - return enable_status; -} - -static void gm206_pmu_load_multiple_falcons(struct gk20a *g, u32 falconidmask, - u32 flags) -{ - struct pmu_gk20a *pmu = &g->pmu; - struct pmu_cmd cmd; - u32 seq; - - gk20a_dbg_fn(""); - - gm206_dbg_pmu("wprinit status = %x\n", g->ops.pmu.lspmuwprinitdone); - if (g->ops.pmu.lspmuwprinitdone) { - /* send message to load FECS falcon */ - memset(&cmd, 0, sizeof(struct pmu_cmd)); - cmd.hdr.unit_id = PMU_UNIT_ACR; - cmd.hdr.size = PMU_CMD_HDR_SIZE + - sizeof(struct pmu_acr_cmd_bootstrap_multiple_falcons); - cmd.cmd.acr.boot_falcons.cmd_type = - PMU_ACR_CMD_ID_BOOTSTRAP_MULTIPLE_FALCONS; - cmd.cmd.acr.boot_falcons.flags = flags; - cmd.cmd.acr.boot_falcons.falconidmask = - falconidmask; - cmd.cmd.acr.boot_falcons.usevamask = 0; - cmd.cmd.acr.boot_falcons.wprvirtualbase.lo = 0; - cmd.cmd.acr.boot_falcons.wprvirtualbase.hi = 0; - - gm206_dbg_pmu("PMU_ACR_CMD_ID_BOOTSTRAP_MULTIPLE_FALCONS:%x\n", - falconidmask); - gk20a_pmu_cmd_post(g, &cmd, NULL, NULL, PMU_COMMAND_QUEUE_HPQ, - pmu_handle_fecs_boot_acr_msg, pmu, &seq, ~0); - } - - gk20a_dbg_fn("done"); -} - -int gm206_load_falcon_ucode(struct gk20a *g, u32 falconidmask) -{ - u32 flags = PMU_ACR_CMD_BOOTSTRAP_FALCON_FLAGS_RESET_YES; - - /* GM20B PMU supports loading FECS and GPCCS only */ - if (falconidmask == 0) - return -EINVAL; - if (falconidmask & ~((1 << LSF_FALCON_ID_FECS) | - (1 << LSF_FALCON_ID_GPCCS))) - return -EINVAL; - g->ops.pmu.lsfloadedfalconid = 0; - /* check whether pmu is ready to bootstrap lsf if not wait for it */ - if (!g->ops.pmu.lspmuwprinitdone) { - pmu_wait_message_cond(&g->pmu, - gk20a_get_gr_idle_timeout(g), - &g->ops.pmu.lspmuwprinitdone, 1); - /* check again if it still not ready indicate an error */ - if (!g->ops.pmu.lspmuwprinitdone) { - gk20a_err(dev_from_gk20a(g), - "PMU not ready to load LSF"); - return -ETIMEDOUT; - } - } - /* load falcon(s) */ - gm206_pmu_load_multiple_falcons(g, falconidmask, flags); - pmu_wait_message_cond(&g->pmu, - gk20a_get_gr_idle_timeout(g), - &g->ops.pmu.lsfloadedfalconid, falconidmask); - if (g->ops.pmu.lsfloadedfalconid != falconidmask) - return -ETIMEDOUT; - return 0; -} - -static bool gm206_is_pmu_supported(struct gk20a *g) -{ - return true; -} - - -void gm206_init_pmu_ops(struct gpu_ops *gops) -{ - gops->pmu.is_pmu_supported = gm206_is_pmu_supported; - if (gops->privsecurity) { - gm206_init_secure_pmu(gops); - gops->pmu.init_wpr_region = gm20b_pmu_init_acr; - gops->pmu.load_lsfalcon_ucode = gm206_load_falcon_ucode; - gops->pmu.is_lazy_bootstrap = gm206_is_lazy_bootstrap; - gops->pmu.is_priv_load = gm206_is_priv_load; - } else { - gk20a_init_pmu_ops(gops); - gops->pmu.pmu_setup_hw_and_bootstrap = - gm20b_init_nspmu_setup_hw1; - gops->pmu.load_lsfalcon_ucode = NULL; - gops->pmu.init_wpr_region = NULL; - } - gops->pmu.pmu_setup_elpg = NULL; - gops->pmu.pmu_get_queue_head = pwr_pmu_queue_head_r; - gops->pmu.pmu_get_queue_head_size = pwr_pmu_queue_head__size_1_v; - gops->pmu.pmu_get_queue_tail = pwr_pmu_queue_tail_r; - gops->pmu.pmu_get_queue_tail_size = pwr_pmu_queue_tail__size_1_v; - gops->pmu.lspmuwprinitdone = 0; - gops->pmu.fecsbootstrapdone = false; - gops->pmu.write_dmatrfbase = gm20b_write_dmatrfbase; - gops->pmu.pmu_elpg_statistics = NULL; - gops->pmu.pmu_pg_init_param = NULL; - gops->pmu.pmu_pg_supported_engines_list = NULL; - gops->pmu.pmu_pg_engines_feature_list = NULL; - gops->pmu.pmu_lpwr_enable_pg = NULL; - gops->pmu.pmu_is_lpwr_feature_supported = NULL; - gops->pmu.pmu_lpwr_disable_pg = NULL; - gops->pmu.pmu_pg_param_post_init = NULL; - gops->pmu.send_lrf_tex_ltc_dram_overide_en_dis_cmd = NULL; - gops->pmu.dump_secure_fuses = NULL; - gops->pmu.reset = gk20a_pmu_reset; -} diff --git a/drivers/gpu/nvgpu/gm206/pmu_gm206.h b/drivers/gpu/nvgpu/gm206/pmu_gm206.h deleted file mode 100644 index 418f30ac..00000000 --- a/drivers/gpu/nvgpu/gm206/pmu_gm206.h +++ /dev/null @@ -1,22 +0,0 @@ -/* - * Copyright (c) 2016, NVIDIA CORPORATION. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - */ - -#ifndef __PMU_GM206_H_ -#define __PMU_GM206_H_ - -void gm206_init_pmu_ops(struct gpu_ops *gops); -bool gm206_is_priv_load(u32 falcon_id); -bool gm206_is_lazy_bootstrap(u32 falcon_id); -int gm206_load_falcon_ucode(struct gk20a *g, u32 falconidmask); - -#endif /*__PMU_GM206_H_*/ -- cgit v1.2.2