From dab594ac13e5ca76d09a9ab383c35ad67c1444ef Mon Sep 17 00:00:00 2001 From: Mahantesh Kumbar Date: Mon, 21 Sep 2015 15:02:37 -0700 Subject: gpu: nvgpu: ELPG init & statistics update - Required init param to start elpg - change in statistics dump Bug 1684939 Change-Id: I26dca52079f08b8962e9cb758831910207610220 Signed-off-by: Mahantesh Kumbar Reviewed-on: http://git-master/r/802456 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Seshendra Gadagottu Reviewed-by: Terje Bergstrom Reviewed-on: http://git-master/r/806179 Tested-by: Terje Bergstrom --- drivers/gpu/nvgpu/gk20a/gk20a.h | 5 ++++ drivers/gpu/nvgpu/gk20a/pmu_gk20a.c | 29 ++++++++++++++----- drivers/gpu/nvgpu/gk20a/pmu_gk20a.h | 55 ++++++++++++++++++++----------------- 3 files changed, 57 insertions(+), 32 deletions(-) (limited to 'drivers/gpu/nvgpu/gk20a') diff --git a/drivers/gpu/nvgpu/gk20a/gk20a.h b/drivers/gpu/nvgpu/gk20a/gk20a.h index 207239d1..a5e130cb 100644 --- a/drivers/gpu/nvgpu/gk20a/gk20a.h +++ b/drivers/gpu/nvgpu/gk20a/gk20a.h @@ -392,6 +392,11 @@ struct gpu_ops { int (*init_wpr_region)(struct gk20a *g); int (*load_lsfalcon_ucode)(struct gk20a *g, u32 falconidmask); void (*write_dmatrfbase)(struct gk20a *g, u32 addr); + void (*pmu_elpg_statistics)(struct gk20a *g, + u32 *ingating_time, u32 *ungating_time, + u32 *gating_cnt); + int (*pmu_pg_grinit_param)(struct gk20a *g, + u8 grfeaturemask); u32 lspmuwprinitdone; u32 lsfloadedfalconid; bool fecsbootstrapdone; diff --git a/drivers/gpu/nvgpu/gk20a/pmu_gk20a.c b/drivers/gpu/nvgpu/gk20a/pmu_gk20a.c index 0328e100..4d459ef4 100644 --- a/drivers/gpu/nvgpu/gk20a/pmu_gk20a.c +++ b/drivers/gpu/nvgpu/gk20a/pmu_gk20a.c @@ -2769,6 +2769,8 @@ void gk20a_init_pmu_ops(struct gpu_ops *gops) gops->pmu.init_wpr_region = NULL; gops->pmu.load_lsfalcon_ucode = NULL; gops->pmu.write_dmatrfbase = gk20a_write_dmatrfbase; + gops->pmu.pmu_elpg_statistics = gk20a_pmu_elpg_statistics; + gops->pmu.pmu_pg_grinit_param = NULL; } int gk20a_init_pmu_support(struct gk20a *g) @@ -2884,6 +2886,10 @@ static int pmu_init_powergating(struct gk20a *g) gk20a_gr_wait_initialized(g); + if (g->ops.pmu.pmu_pg_grinit_param) + g->ops.pmu.pmu_pg_grinit_param(g, + PMU_PG_FEATURE_GR_POWER_GATING_ENABLED); + /* init ELPG */ memset(&cmd, 0, sizeof(struct pmu_cmd)); cmd.hdr.unit_id = PMU_UNIT_PG; @@ -4241,11 +4247,24 @@ void gk20a_pmu_reset_load_counters(struct gk20a *g) gk20a_idle(g->dev); } +void gk20a_pmu_elpg_statistics(struct gk20a *g, + u32 *ingating_time, u32 *ungating_time, u32 *gating_cnt) +{ + struct pmu_gk20a *pmu = &g->pmu; + struct pmu_pg_stats stats; + + pmu_copy_from_dmem(pmu, pmu->stat_dmem_offset, + (u8 *)&stats, sizeof(struct pmu_pg_stats), 0); + + *ingating_time = stats.pg_ingating_time_us; + *ungating_time = stats.pg_ungating_time_us; + *gating_cnt = stats.pg_gating_cnt; +} + static int gk20a_pmu_get_elpg_residency_gating(struct gk20a *g, u32 *ingating_time, u32 *ungating_time, u32 *gating_cnt) { struct pmu_gk20a *pmu = &g->pmu; - struct pmu_pg_stats stats; if (!pmu->initialized) { *ingating_time = 0; @@ -4254,12 +4273,8 @@ static int gk20a_pmu_get_elpg_residency_gating(struct gk20a *g, return 0; } - pmu_copy_from_dmem(pmu, pmu->stat_dmem_offset, - (u8 *)&stats, sizeof(struct pmu_pg_stats), 0); - - *ingating_time = stats.pg_ingating_time_us; - *ungating_time = stats.pg_ungating_time_us; - *gating_cnt = stats.pg_gating_cnt; + g->ops.pmu.pmu_elpg_statistics(g, ingating_time, + ungating_time, gating_cnt); return 0; } diff --git a/drivers/gpu/nvgpu/gk20a/pmu_gk20a.h b/drivers/gpu/nvgpu/gk20a/pmu_gk20a.h index bbfcf4ee..683c1dfc 100644 --- a/drivers/gpu/nvgpu/gk20a/pmu_gk20a.h +++ b/drivers/gpu/nvgpu/gk20a/pmu_gk20a.h @@ -680,6 +680,8 @@ enum { PMU_PG_STAT_CMD_ALLOC_DMEM = 0, }; +#define PMU_PG_PARAM_CMD_GR_INIT_PARAM 0x0 + #define PMU_PG_FEATURE_GR_SDIV_SLOWDOWN_ENABLED (1 << 0) #define PMU_PG_FEATURE_GR_POWER_GATING_ENABLED (1 << 2) @@ -1135,31 +1137,31 @@ struct pmu_sequence { }; struct pmu_pg_stats_v1 { - /* Number of time PMU successfully engaged sleep state */ - u32 entryCount; - /* Number of time PMU exit sleep state */ - u32 exitCount; - /* Number of time PMU aborted in entry sequence */ - u32 abortCount; - /* - * Time for which GPU was neither in Sleep state not - * executing sleep sequence. - * */ - u32 poweredUpTimeUs; - /* Entry and exit latency of current sleep cycle */ - u32 entryLatencyUs; - u32 exitLatencyUs; - /* Resident time for current sleep cycle. */ - u32 residentTimeUs; - /* Rolling average entry and exit latencies */ - u32 entryLatencyAvgUs; - u32 exitLatencyAvgUs; - /* Max entry and exit latencies */ - u32 entryLatencyMaxUs; - u32 exitLatencyMaxUs; - /* Total time spent in sleep and non-sleep state */ - u32 totalSleepTimeUs; - u32 totalNonSleepTimeUs; + /* Number of time PMU successfully engaged sleep state */ + u32 entry_count; + /* Number of time PMU exit sleep state */ + u32 exit_count; + /* Number of time PMU aborted in entry sequence */ + u32 abort_count; + /* + * Time for which GPU was neither in Sleep state not + * executing sleep sequence. + * */ + u32 poweredup_timeus; + /* Entry and exit latency of current sleep cycle */ + u32 entry_latency_us; + u32 exitlatencyus; + /* Resident time for current sleep cycle. */ + u32 resident_timeus; + /* Rolling average entry and exit latencies */ + u32 entrylatency_avgus; + u32 exitlatency_avgus; + /* Max entry and exit latencies */ + u32 entrylatency_maxus; + u32 exitlatency_maxus; + /* Total time spent in sleep and non-sleep state */ + u32 total_sleep_timeus; + u32 total_nonsleep_timeus; }; struct pmu_pg_stats { @@ -1369,4 +1371,7 @@ int pmu_wait_message_cond(struct pmu_gk20a *pmu, u32 timeout, u32 *var, u32 val); void pmu_handle_fecs_boot_acr_msg(struct gk20a *g, struct pmu_msg *msg, void *param, u32 handle, u32 status); +void gk20a_pmu_elpg_statistics(struct gk20a *g, + u32 *ingating_time, u32 *ungating_time, u32 *gating_cnt); + #endif /*__PMU_GK20A_H__*/ -- cgit v1.2.2