From d71d38087ded679f60714dae3a859523a19df04f Mon Sep 17 00:00:00 2001 From: Terje Bergstrom Date: Thu, 24 May 2018 15:25:41 -0700 Subject: gpu: nvgpu: Separate timer from bus Code touching timer registers was combined with bus code. They're two logically separate register spaces, so separate the code accordingly. JIRA NVGPU-588 Change-Id: I40e2925ff156669f41ddc1f2e7714f92a2da367b Signed-off-by: Terje Bergstrom Reviewed-on: https://git-master.nvidia.com/r/1730893 Reviewed-by: mobile promotions Tested-by: mobile promotions --- drivers/gpu/nvgpu/gk20a/gk20a.h | 12 ++++++++---- 1 file changed, 8 insertions(+), 4 deletions(-) (limited to 'drivers/gpu/nvgpu/gk20a') diff --git a/drivers/gpu/nvgpu/gk20a/gk20a.h b/drivers/gpu/nvgpu/gk20a/gk20a.h index 2a9fb57c..08a1fc10 100644 --- a/drivers/gpu/nvgpu/gk20a/gk20a.h +++ b/drivers/gpu/nvgpu/gk20a/gk20a.h @@ -1120,16 +1120,20 @@ struct gpu_ops { struct { void (*init_hw)(struct gk20a *g); void (*isr)(struct gk20a *g); - int (*read_ptimer)(struct gk20a *g, u64 *value); - int (*get_timestamps_zipper)(struct gk20a *g, - u32 source_id, u32 count, - struct nvgpu_cpu_time_correlation_sample *); int (*bar1_bind)(struct gk20a *g, struct nvgpu_mem *bar1_inst); u32 (*set_bar0_window)(struct gk20a *g, struct nvgpu_mem *mem, struct nvgpu_sgt *sgt, struct nvgpu_sgl *sgl, u32 w); } bus; + struct { + void (*isr)(struct gk20a *g); + int (*read_ptimer)(struct gk20a *g, u64 *value); + int (*get_timestamps_zipper)(struct gk20a *g, + u32 source_id, u32 count, + struct nvgpu_cpu_time_correlation_sample *); + } ptimer; + struct { int (*init)(struct gk20a *g); int (*preos_wait_for_halt)(struct gk20a *g); -- cgit v1.2.2