From a0dfb2b91112a766fb4b3e2aaafa99167151c3da Mon Sep 17 00:00:00 2001 From: Deepak Nibade Date: Fri, 13 Apr 2018 13:18:28 +0530 Subject: gpu: nvgpu: gv100: consider floorswept FBPA for getting unicast list In gr_gv11b/gk20a_create_priv_addr_table() we do not consider floorswept FBPAs and just calculate the unicast list assuming all FBPAs are present This generates incorrect list of unicast addresses Fix this introducing new HAL ops.gr.split_fbpa_broadcast_addr Set gr_gv100_get_active_fpba_mask() for GV100 Set gr_gk20a_split_fbpa_broadcast_addr() for rest of the chips gr_gv100_get_active_fpba_mask() will first get active FPBA mask and generate unicast list only for active FBPAs Bug 200398811 Jira NVGPU-556 Change-Id: Idd11d6e7ad7b6836525fe41509aeccf52038321f Signed-off-by: Deepak Nibade Reviewed-on: https://git-master.nvidia.com/r/1694444 GVS: Gerrit_Virtual_Submit Reviewed-by: Bharat Nihalani Reviewed-by: mobile promotions Tested-by: mobile promotions --- drivers/gpu/nvgpu/gk20a/gk20a.h | 4 ++++ drivers/gpu/nvgpu/gk20a/gr_gk20a.c | 20 ++++++++++++++------ drivers/gpu/nvgpu/gk20a/gr_gk20a.h | 3 +++ 3 files changed, 21 insertions(+), 6 deletions(-) (limited to 'drivers/gpu/nvgpu/gk20a') diff --git a/drivers/gpu/nvgpu/gk20a/gk20a.h b/drivers/gpu/nvgpu/gk20a/gk20a.h index 2d1eb388..c55ba146 100644 --- a/drivers/gpu/nvgpu/gk20a/gk20a.h +++ b/drivers/gpu/nvgpu/gk20a/gk20a.h @@ -472,6 +472,10 @@ struct gpu_ops { u32 *priv_addr_table, u32 *num_registers); u32 (*get_pmm_per_chiplet_offset)(void); + void (*split_fbpa_broadcast_addr)(struct gk20a *g, u32 addr, + u32 num_fbpas, + u32 *priv_addr_table, + u32 *priv_addr_table_index); } gr; struct { void (*init_hw)(struct gk20a *g); diff --git a/drivers/gpu/nvgpu/gk20a/gr_gk20a.c b/drivers/gpu/nvgpu/gk20a/gr_gk20a.c index 96bc72af..121f264a 100644 --- a/drivers/gpu/nvgpu/gk20a/gr_gk20a.c +++ b/drivers/gpu/nvgpu/gk20a/gr_gk20a.c @@ -6323,6 +6323,17 @@ int gr_gk20a_decode_priv_addr(struct gk20a *g, u32 addr, return -EINVAL; } +void gr_gk20a_split_fbpa_broadcast_addr(struct gk20a *g, u32 addr, + u32 num_fbpas, + u32 *priv_addr_table, u32 *t) +{ + u32 fbpa_id; + + for (fbpa_id = 0; fbpa_id < num_fbpas; fbpa_id++) + priv_addr_table[(*t)++] = pri_fbpa_addr(g, + pri_fbpa_addr_mask(g, addr), fbpa_id); +} + int gr_gk20a_split_ppc_broadcast_addr(struct gk20a *g, u32 addr, u32 gpc_num, u32 *priv_addr_table, u32 *t) @@ -6356,7 +6367,6 @@ int gr_gk20a_create_priv_addr_table(struct gk20a *g, u32 broadcast_flags; u32 t; int err; - int fbpa_num; t = 0; *num_registers = 0; @@ -6430,11 +6440,9 @@ int gr_gk20a_create_priv_addr_table(struct gk20a *g, g->ops.gr.split_ltc_broadcast_addr(g, addr, priv_addr_table, &t); } else if (broadcast_flags & PRI_BROADCAST_FLAGS_FBPA) { - for (fbpa_num = 0; - fbpa_num < nvgpu_get_litter_value(g, GPU_LIT_NUM_FBPAS); - fbpa_num++) - priv_addr_table[t++] = pri_fbpa_addr(g, - pri_fbpa_addr_mask(g, addr), fbpa_num); + g->ops.gr.split_fbpa_broadcast_addr(g, addr, + nvgpu_get_litter_value(g, GPU_LIT_NUM_FBPAS), + priv_addr_table, &t); } else if (!(broadcast_flags & PRI_BROADCAST_FLAGS_GPC)) { if (broadcast_flags & PRI_BROADCAST_FLAGS_TPC) for (tpc_num = 0; diff --git a/drivers/gpu/nvgpu/gk20a/gr_gk20a.h b/drivers/gpu/nvgpu/gk20a/gr_gk20a.h index cd58cfa3..02f5e534 100644 --- a/drivers/gpu/nvgpu/gk20a/gr_gk20a.h +++ b/drivers/gpu/nvgpu/gk20a/gr_gk20a.h @@ -832,4 +832,7 @@ int gr_gk20a_create_priv_addr_table(struct gk20a *g, u32 addr, u32 *priv_addr_table, u32 *num_registers); +void gr_gk20a_split_fbpa_broadcast_addr(struct gk20a *g, u32 addr, + u32 num_fbpas, + u32 *priv_addr_table, u32 *t); #endif /*__GR_GK20A_H__*/ -- cgit v1.2.2