From 974d541623929fa2622d27d5d338a5b63596794b Mon Sep 17 00:00:00 2001 From: Terje Bergstrom Date: Mon, 13 Aug 2018 12:58:18 -0700 Subject: gpu: nvgpu: Move ltc HAL to common Move implementation of ltc HAL to common/ltc. JIRA NVGPU-956 Change-Id: Id78d74e8612d7dacfb8d322d491abecd798e42b5 Signed-off-by: Terje Bergstrom Reviewed-on: https://git-master.nvidia.com/r/1798461 Reviewed-by: mobile promotions Tested-by: mobile promotions --- drivers/gpu/nvgpu/gk20a/gk20a.h | 18 +++++++++--------- drivers/gpu/nvgpu/gk20a/gr_gk20a.c | 11 +++++------ drivers/gpu/nvgpu/gk20a/gr_pri_gk20a.h | 10 ---------- drivers/gpu/nvgpu/gk20a/mm_gk20a.c | 1 - 4 files changed, 14 insertions(+), 26 deletions(-) (limited to 'drivers/gpu/nvgpu/gk20a') diff --git a/drivers/gpu/nvgpu/gk20a/gk20a.h b/drivers/gpu/nvgpu/gk20a/gk20a.h index 5bb91f62..f802cd56 100644 --- a/drivers/gpu/nvgpu/gk20a/gk20a.h +++ b/drivers/gpu/nvgpu/gk20a/gk20a.h @@ -194,6 +194,15 @@ struct gpu_ops { u32 (*cbc_fix_config)(struct gk20a *g, int base); void (*flush)(struct gk20a *g); void (*intr_en_illegal_compstat)(struct gk20a *g, bool enable); + bool (*pri_is_ltc_addr)(struct gk20a *g, u32 addr); + bool (*is_ltcs_ltss_addr)(struct gk20a *g, u32 addr); + bool (*is_ltcn_ltss_addr)(struct gk20a *g, u32 addr); + void (*split_lts_broadcast_addr)(struct gk20a *g, u32 addr, + u32 *priv_addr_table, + u32 *priv_addr_table_index); + void (*split_ltc_broadcast_addr)(struct gk20a *g, u32 addr, + u32 *priv_addr_table, + u32 *priv_addr_table_index); } ltc; struct { void (*isr_stall)(struct gk20a *g, u32 inst_id, u32 pri_base); @@ -274,15 +283,6 @@ struct gpu_ops { u32 *gpc_num, u32 *tpc_num); u32 (*get_tpc_num)(struct gk20a *g, u32 addr); u32 (*get_egpc_base)(struct gk20a *g); - bool (*is_ltcs_ltss_addr)(struct gk20a *g, u32 addr); - bool (*is_ltcn_ltss_addr)(struct gk20a *g, u32 addr); - bool (*get_lts_in_ltc_shared_base)(void); - void (*split_lts_broadcast_addr)(struct gk20a *g, u32 addr, - u32 *priv_addr_table, - u32 *priv_addr_table_index); - void (*split_ltc_broadcast_addr)(struct gk20a *g, u32 addr, - u32 *priv_addr_table, - u32 *priv_addr_table_index); void (*detect_sm_arch)(struct gk20a *g); int (*add_zbc_color)(struct gk20a *g, struct gr_gk20a *gr, struct zbc_entry *color_val, u32 index); diff --git a/drivers/gpu/nvgpu/gk20a/gr_gk20a.c b/drivers/gpu/nvgpu/gk20a/gr_gk20a.c index bb54e00e..fbba02ca 100644 --- a/drivers/gpu/nvgpu/gk20a/gr_gk20a.c +++ b/drivers/gpu/nvgpu/gk20a/gr_gk20a.c @@ -59,7 +59,6 @@ #include #include #include -#include #include #include @@ -6256,11 +6255,11 @@ int gr_gk20a_decode_priv_addr(struct gk20a *g, u32 addr, } *be_num = pri_get_be_num(g, addr); return 0; - } else if (pri_is_ltc_addr(addr)) { + } else if (g->ops.ltc.pri_is_ltc_addr(g, addr)) { *addr_type = CTXSW_ADDR_TYPE_LTCS; - if (g->ops.gr.is_ltcs_ltss_addr(g, addr)) + if (g->ops.ltc.is_ltcs_ltss_addr(g, addr)) *broadcast_flags |= PRI_BROADCAST_FLAGS_LTCS; - else if (g->ops.gr.is_ltcn_ltss_addr(g, addr)) + else if (g->ops.ltc.is_ltcn_ltss_addr(g, addr)) *broadcast_flags |= PRI_BROADCAST_FLAGS_LTSS; return 0; } else if (pri_is_fbpa_addr(g, addr)) { @@ -6398,10 +6397,10 @@ int gr_gk20a_create_priv_addr_table(struct gk20a *g, g->ops.gr.egpc_etpc_priv_addr_table(g, addr, gpc_num, tpc_num, broadcast_flags, priv_addr_table, &t); } else if (broadcast_flags & PRI_BROADCAST_FLAGS_LTSS) { - g->ops.gr.split_lts_broadcast_addr(g, addr, + g->ops.ltc.split_lts_broadcast_addr(g, addr, priv_addr_table, &t); } else if (broadcast_flags & PRI_BROADCAST_FLAGS_LTCS) { - g->ops.gr.split_ltc_broadcast_addr(g, addr, + g->ops.ltc.split_ltc_broadcast_addr(g, addr, priv_addr_table, &t); } else if (broadcast_flags & PRI_BROADCAST_FLAGS_FBPA) { g->ops.gr.split_fbpa_broadcast_addr(g, addr, diff --git a/drivers/gpu/nvgpu/gk20a/gr_pri_gk20a.h b/drivers/gpu/nvgpu/gk20a/gr_pri_gk20a.h index af390833..32a30d78 100644 --- a/drivers/gpu/nvgpu/gk20a/gr_pri_gk20a.h +++ b/drivers/gpu/nvgpu/gk20a/gr_pri_gk20a.h @@ -29,8 +29,6 @@ * of the context state store for gr/compute contexts. */ -#include - /* * GPC pri addressing */ @@ -227,14 +225,6 @@ static inline u32 pri_ppc_addr(struct gk20a *g, u32 addr, u32 gpc, u32 ppc) ppc_in_gpc_base + (ppc * ppc_in_gpc_stride) + addr; } -/* - * LTC pri addressing - */ -static inline bool pri_is_ltc_addr(u32 addr) -{ - return ((addr >= ltc_pltcg_base_v()) && (addr < ltc_pltcg_extent_v())); -} - enum ctxsw_addr_type { CTXSW_ADDR_TYPE_SYS = 0, CTXSW_ADDR_TYPE_GPC = 1, diff --git a/drivers/gpu/nvgpu/gk20a/mm_gk20a.c b/drivers/gpu/nvgpu/gk20a/mm_gk20a.c index 5bba5d9c..ee63489e 100644 --- a/drivers/gpu/nvgpu/gk20a/mm_gk20a.c +++ b/drivers/gpu/nvgpu/gk20a/mm_gk20a.c @@ -52,7 +52,6 @@ #include #include #include -#include /* * GPU mapping life cycle -- cgit v1.2.2