From 8d8ff9d34e9707e9306fcf40b5ffcfa0d826765a Mon Sep 17 00:00:00 2001 From: Richard Zhao Date: Mon, 19 Mar 2018 17:03:46 -0700 Subject: gpu: nvgpu: add gops.fifo.set_error_notifier RM Server overrides it for handling stall interrupts. Jira VQRM-3058 Change-Id: I8b14f073e952d19c808cb693958626b8d8aee8ca Signed-off-by: Richard Zhao Reviewed-on: https://git-master.nvidia.com/r/1679709 Reviewed-by: mobile promotions Tested-by: mobile promotions --- drivers/gpu/nvgpu/gk20a/fifo_gk20a.c | 19 ++++++++++--------- drivers/gpu/nvgpu/gk20a/gk20a.h | 1 + drivers/gpu/nvgpu/gk20a/gr_gk20a.c | 4 ++-- 3 files changed, 13 insertions(+), 11 deletions(-) (limited to 'drivers/gpu/nvgpu/gk20a') diff --git a/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c b/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c index 79aec7a2..576a7f81 100644 --- a/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c +++ b/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c @@ -1393,7 +1393,7 @@ void gk20a_fifo_set_ctx_mmu_error_ch(struct gk20a *g, { nvgpu_err(g, "channel %d generated a mmu fault", refch->chid); - nvgpu_set_error_notifier(refch, + g->ops.fifo.set_error_notifier(refch, NVGPU_ERR_NOTIFIER_FIFO_ERROR_MMU_ERR_FLT); } @@ -1938,7 +1938,8 @@ int gk20a_fifo_force_reset_ch(struct channel_gk20a *ch, nvgpu_list_for_each_entry(ch_tsg, &tsg->ch_list, channel_gk20a, ch_entry) { if (gk20a_channel_get(ch_tsg)) { - nvgpu_set_error_notifier(ch_tsg, err_code); + g->ops.fifo.set_error_notifier(ch_tsg, + err_code); gk20a_channel_put(ch_tsg); } } @@ -1946,7 +1947,7 @@ int gk20a_fifo_force_reset_ch(struct channel_gk20a *ch, nvgpu_rwsem_up_read(&tsg->ch_list_lock); gk20a_fifo_recover_tsg(g, ch->tsgid, verbose); } else { - nvgpu_set_error_notifier(ch, err_code); + g->ops.fifo.set_error_notifier(ch, err_code); gk20a_fifo_recover_ch(g, ch->chid, verbose); } @@ -2108,7 +2109,7 @@ bool gk20a_fifo_check_ch_ctxsw_timeout(struct channel_gk20a *ch, *verbose = ch->timeout_debug_dump; *ms = ch->timeout_accumulated_ms; if (recover) - nvgpu_set_error_notifier(ch, + ch->g->ops.fifo.set_error_notifier(ch, NVGPU_ERR_NOTIFIER_FIFO_ERROR_IDLE_TIMEOUT); gk20a_channel_put(ch); @@ -2172,7 +2173,7 @@ bool gk20a_fifo_check_tsg_ctxsw_timeout(struct tsg_gk20a *tsg, nvgpu_list_for_each_entry(ch, &tsg->ch_list, channel_gk20a, ch_entry) { if (gk20a_channel_get(ch)) { - nvgpu_set_error_notifier(ch, + ch->g->ops.fifo.set_error_notifier(ch, NVGPU_ERR_NOTIFIER_FIFO_ERROR_IDLE_TIMEOUT); *verbose |= ch->timeout_debug_dump; gk20a_channel_put(ch); @@ -2487,7 +2488,7 @@ static void gk20a_fifo_pbdma_fault_rc(struct gk20a *g, struct channel_gk20a *ch = &f->channel[id]; if (gk20a_channel_get(ch)) { - nvgpu_set_error_notifier(ch, error_notifier); + g->ops.fifo.set_error_notifier(ch, error_notifier); gk20a_fifo_recover_ch(g, id, true); gk20a_channel_put(ch); } @@ -2500,7 +2501,7 @@ static void gk20a_fifo_pbdma_fault_rc(struct gk20a *g, nvgpu_list_for_each_entry(ch, &tsg->ch_list, channel_gk20a, ch_entry) { if (gk20a_channel_get(ch)) { - nvgpu_set_error_notifier(ch, + g->ops.fifo.set_error_notifier(ch, error_notifier); gk20a_channel_put(ch); } @@ -2662,7 +2663,7 @@ void __locked_fifo_preempt_timeout_rc(struct gk20a *g, u32 id, channel_gk20a, ch_entry) { if (!gk20a_channel_get(ch)) continue; - nvgpu_set_error_notifier(ch, + g->ops.fifo.set_error_notifier(ch, NVGPU_ERR_NOTIFIER_FIFO_ERROR_IDLE_TIMEOUT); gk20a_channel_put(ch); } @@ -2675,7 +2676,7 @@ void __locked_fifo_preempt_timeout_rc(struct gk20a *g, u32 id, "preempt channel %d timeout", id); if (gk20a_channel_get(ch)) { - nvgpu_set_error_notifier(ch, + g->ops.fifo.set_error_notifier(ch, NVGPU_ERR_NOTIFIER_FIFO_ERROR_IDLE_TIMEOUT); gk20a_fifo_recover_ch(g, id, true); gk20a_channel_put(ch); diff --git a/drivers/gpu/nvgpu/gk20a/gk20a.h b/drivers/gpu/nvgpu/gk20a/gk20a.h index c7653133..e8cfaf13 100644 --- a/drivers/gpu/nvgpu/gk20a/gk20a.h +++ b/drivers/gpu/nvgpu/gk20a/gk20a.h @@ -635,6 +635,7 @@ struct gpu_ops { bool *verbose, u32 *ms); int (*channel_suspend)(struct gk20a *g); int (*channel_resume)(struct gk20a *g); + void (*set_error_notifier)(struct channel_gk20a *ch, u32 error); #ifdef CONFIG_TEGRA_GK20A_NVHOST int (*alloc_syncpt_buf)(struct channel_gk20a *c, u32 syncpt_id, struct nvgpu_mem *syncpt_buf); diff --git a/drivers/gpu/nvgpu/gk20a/gr_gk20a.c b/drivers/gpu/nvgpu/gk20a/gr_gk20a.c index cf63546b..e06d190e 100644 --- a/drivers/gpu/nvgpu/gk20a/gr_gk20a.c +++ b/drivers/gpu/nvgpu/gk20a/gr_gk20a.c @@ -5154,14 +5154,14 @@ void gk20a_gr_set_error_notifier(struct gk20a *g, nvgpu_list_for_each_entry(ch_tsg, &tsg->ch_list, channel_gk20a, ch_entry) { if (gk20a_channel_get(ch_tsg)) { - nvgpu_set_error_notifier(ch_tsg, + g->ops.fifo.set_error_notifier(ch_tsg, error_notifier); gk20a_channel_put(ch_tsg); } } nvgpu_rwsem_up_read(&tsg->ch_list_lock); } else { - nvgpu_set_error_notifier(ch, error_notifier); + g->ops.fifo.set_error_notifier(ch, error_notifier); } } } -- cgit v1.2.2