From 7d8e2193893454bc8e05543c956fab32b8eed54b Mon Sep 17 00:00:00 2001 From: Terje Bergstrom Date: Thu, 31 Mar 2016 11:13:42 -0700 Subject: gpu: nvgpu: Use sysmem aperture for SoC memory In Tegra GPU, SoC memory has to be accessed as vidmem. In discrete GPU, it has to be accessed as sysmem. Change-Id: I4efe71b54a9a32f0bf1f02ec4016ed74405a14c5 Signed-off-by: Terje Bergstrom Reviewed-on: http://git-master/r/1120468 --- drivers/gpu/nvgpu/gk20a/channel_gk20a.c | 14 +++++++++----- drivers/gpu/nvgpu/gk20a/fifo_gk20a.c | 4 +++- drivers/gpu/nvgpu/gk20a/gr_gk20a.c | 24 ++++++++++++++++++------ drivers/gpu/nvgpu/gk20a/hw_bus_gk20a.h | 18 +++++++++++++++++- drivers/gpu/nvgpu/gk20a/hw_ccsr_gk20a.h | 10 +++++++++- drivers/gpu/nvgpu/gk20a/hw_fb_gk20a.h | 22 +++++++++++++++++++++- drivers/gpu/nvgpu/gk20a/hw_fifo_gk20a.h | 10 +++++++++- drivers/gpu/nvgpu/gk20a/hw_gmmu_gk20a.h | 26 +++++++++++++++++++++++++- drivers/gpu/nvgpu/gk20a/hw_gr_gk20a.h | 8 ++++++++ drivers/gpu/nvgpu/gk20a/hw_pbdma_gk20a.h | 8 ++++++++ drivers/gpu/nvgpu/gk20a/hw_pwr_gk20a.h | 6 +++++- drivers/gpu/nvgpu/gk20a/hw_ram_gk20a.h | 10 +++++++++- drivers/gpu/nvgpu/gk20a/mm_gk20a.c | 32 ++++++++++++++++++++++---------- drivers/gpu/nvgpu/gk20a/mm_gk20a.h | 2 ++ 14 files changed, 165 insertions(+), 29 deletions(-) (limited to 'drivers/gpu/nvgpu/gk20a') diff --git a/drivers/gpu/nvgpu/gk20a/channel_gk20a.c b/drivers/gpu/nvgpu/gk20a/channel_gk20a.c index e8d82e0e..b7bccd07 100644 --- a/drivers/gpu/nvgpu/gk20a/channel_gk20a.c +++ b/drivers/gpu/nvgpu/gk20a/channel_gk20a.c @@ -130,6 +130,7 @@ static int channel_gk20a_commit_userd(struct channel_gk20a *c) u32 addr_lo; u32 addr_hi; void *inst_ptr; + struct gk20a *g = c->g; gk20a_dbg_fn(""); @@ -144,12 +145,13 @@ static int channel_gk20a_commit_userd(struct channel_gk20a *c) c->hw_chid, (u64)c->userd_iova); gk20a_mem_wr32(inst_ptr, ram_in_ramfc_w() + ram_fc_userd_w(), - pbdma_userd_target_vid_mem_f() | - pbdma_userd_addr_f(addr_lo)); + (g->mm.vidmem_is_vidmem ? + pbdma_userd_target_sys_mem_ncoh_f() : + pbdma_userd_target_vid_mem_f()) | + pbdma_userd_addr_f(addr_lo)); gk20a_mem_wr32(inst_ptr, ram_in_ramfc_w() + ram_fc_userd_hi_w(), - pbdma_userd_target_vid_mem_f() | - pbdma_userd_hi_addr_f(addr_hi)); + pbdma_userd_hi_addr_f(addr_hi)); return 0; } @@ -354,7 +356,9 @@ static void channel_gk20a_bind(struct channel_gk20a *c) gk20a_writel(g, ccsr_channel_inst_r(c->hw_chid), ccsr_channel_inst_ptr_f(inst_ptr) | - ccsr_channel_inst_target_vid_mem_f() | + (g->mm.vidmem_is_vidmem ? + ccsr_channel_inst_target_sys_mem_ncoh_f() : + ccsr_channel_inst_target_vid_mem_f()) | ccsr_channel_inst_bind_true_f()); gk20a_writel(g, ccsr_channel_r(c->hw_chid), diff --git a/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c b/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c index 33ed9a04..d8c07c89 100644 --- a/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c +++ b/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c @@ -2405,7 +2405,9 @@ static int gk20a_fifo_update_runlist_locked(struct gk20a *g, u32 runlist_id, if (count != 0) { gk20a_writel(g, fifo_runlist_base_r(), fifo_runlist_base_ptr_f(u64_lo32(runlist_iova >> 12)) | - fifo_runlist_base_target_vid_mem_f()); + (g->mm.vidmem_is_vidmem ? + fifo_runlist_base_target_sys_mem_ncoh_f() : + fifo_runlist_base_target_vid_mem_f())); } gk20a_writel(g, fifo_runlist_r(), diff --git a/drivers/gpu/nvgpu/gk20a/gr_gk20a.c b/drivers/gpu/nvgpu/gk20a/gr_gk20a.c index 51a61de3..734552a1 100644 --- a/drivers/gpu/nvgpu/gk20a/gr_gk20a.c +++ b/drivers/gpu/nvgpu/gk20a/gr_gk20a.c @@ -739,7 +739,9 @@ static int gr_gk20a_fecs_ctx_bind_channel(struct gk20a *g, (struct fecs_method_op_gk20a) { .method.addr = gr_fecs_method_push_adr_bind_pointer_v(), .method.data = (gr_fecs_current_ctx_ptr_f(inst_base_ptr) | - gr_fecs_current_ctx_target_vid_mem_f() | + (g->mm.vidmem_is_vidmem ? + gr_fecs_current_ctx_target_sys_mem_ncoh_f() : + gr_fecs_current_ctx_target_vid_mem_f()) | gr_fecs_current_ctx_valid_f(1)), .mailbox = { .id = 0, .data = 0, .clr = 0x30, @@ -1421,7 +1423,9 @@ static int gr_gk20a_fecs_ctx_image_save(struct channel_gk20a *c, u32 save_type) (struct fecs_method_op_gk20a) { .method.addr = save_type, .method.data = (gr_fecs_current_ctx_ptr_f(inst_base_ptr) | - gr_fecs_current_ctx_target_vid_mem_f() | + (g->mm.vidmem_is_vidmem ? + gr_fecs_current_ctx_target_sys_mem_ncoh_f() : + gr_fecs_current_ctx_target_vid_mem_f()) | gr_fecs_current_ctx_valid_f(1)), .mailbox = {.id = 0, .data = 0, .clr = 3, .ret = NULL, .ok = 1, .fail = 2, @@ -1885,7 +1889,9 @@ int gr_gk20a_load_golden_ctx_image(struct gk20a *g, (struct fecs_method_op_gk20a) { .method.data = (gr_fecs_current_ctx_ptr_f(inst_base_ptr) | - gr_fecs_current_ctx_target_vid_mem_f() | + (g->mm.vidmem_is_vidmem ? + gr_fecs_current_ctx_target_sys_mem_ncoh_f() : + gr_fecs_current_ctx_target_vid_mem_f()) | gr_fecs_current_ctx_valid_f(1)), .method.addr = gr_fecs_method_push_adr_restore_golden_v(), @@ -4291,7 +4297,9 @@ static int gk20a_init_gr_setup_hw(struct gk20a *g) addr >>= fb_mmu_debug_wr_addr_alignment_v(); gk20a_writel(g, fb_mmu_debug_wr_r(), - fb_mmu_debug_wr_aperture_vid_mem_f() | + (g->mm.vidmem_is_vidmem ? + fb_mmu_debug_wr_aperture_sys_mem_ncoh_f() : + fb_mmu_debug_wr_aperture_vid_mem_f()) | fb_mmu_debug_wr_vol_false_f() | fb_mmu_debug_wr_addr_f(addr)); @@ -4299,7 +4307,9 @@ static int gk20a_init_gr_setup_hw(struct gk20a *g) addr >>= fb_mmu_debug_rd_addr_alignment_v(); gk20a_writel(g, fb_mmu_debug_rd_r(), - fb_mmu_debug_rd_aperture_vid_mem_f() | + (g->mm.vidmem_is_vidmem ? + fb_mmu_debug_wr_aperture_sys_mem_ncoh_f() : + fb_mmu_debug_rd_aperture_vid_mem_f()) | fb_mmu_debug_rd_vol_false_f() | fb_mmu_debug_rd_addr_f(addr)); @@ -5967,7 +5977,9 @@ int gr_gk20a_fecs_set_reglist_bind_inst(struct gk20a *g, phys_addr_t addr) .mailbox.id = 4, .mailbox.data = (gr_fecs_current_ctx_ptr_f(addr >> 12) | gr_fecs_current_ctx_valid_f(1) | - gr_fecs_current_ctx_target_vid_mem_f()), + (g->mm.vidmem_is_vidmem ? + gr_fecs_current_ctx_target_sys_mem_ncoh_f() : + gr_fecs_current_ctx_target_vid_mem_f())), .mailbox.clr = ~0, .method.data = 1, .method.addr = gr_fecs_method_push_adr_set_reglist_bind_instance_v(), diff --git a/drivers/gpu/nvgpu/gk20a/hw_bus_gk20a.h b/drivers/gpu/nvgpu/gk20a/hw_bus_gk20a.h index 44ef9424..8a69c573 100644 --- a/drivers/gpu/nvgpu/gk20a/hw_bus_gk20a.h +++ b/drivers/gpu/nvgpu/gk20a/hw_bus_gk20a.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2012-2015, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2012-2016, NVIDIA CORPORATION. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms and conditions of the GNU General Public License, @@ -62,6 +62,14 @@ static inline u32 bus_bar1_block_target_vid_mem_f(void) { return 0x0; } +static inline u32 bus_bar1_block_target_sys_mem_coh_f(void) +{ + return 0x20000000; +} +static inline u32 bus_bar1_block_target_sys_mem_ncoh_f(void) +{ + return 0x30000000; +} static inline u32 bus_bar1_block_mode_virtual_f(void) { return 0x80000000; @@ -78,6 +86,14 @@ static inline u32 bus_bar2_block_target_vid_mem_f(void) { return 0x0; } +static inline u32 bus_bar2_block_target_sys_mem_coh_f(void) +{ + return 0x20000000; +} +static inline u32 bus_bar2_block_target_sys_mem_ncoh_f(void) +{ + return 0x30000000; +} static inline u32 bus_bar2_block_mode_virtual_f(void) { return 0x80000000; diff --git a/drivers/gpu/nvgpu/gk20a/hw_ccsr_gk20a.h b/drivers/gpu/nvgpu/gk20a/hw_ccsr_gk20a.h index 573329f1..4877e4a8 100644 --- a/drivers/gpu/nvgpu/gk20a/hw_ccsr_gk20a.h +++ b/drivers/gpu/nvgpu/gk20a/hw_ccsr_gk20a.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2012-2013, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2012-2016, NVIDIA CORPORATION. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms and conditions of the GNU General Public License, @@ -66,6 +66,14 @@ static inline u32 ccsr_channel_inst_target_vid_mem_f(void) { return 0x0; } +static inline u32 ccsr_channel_inst_target_sys_mem_coh_f(void) +{ + return 0x20000000; +} +static inline u32 ccsr_channel_inst_target_sys_mem_ncoh_f(void) +{ + return 0x30000000; +} static inline u32 ccsr_channel_inst_bind_false_f(void) { return 0x0; diff --git a/drivers/gpu/nvgpu/gk20a/hw_fb_gk20a.h b/drivers/gpu/nvgpu/gk20a/hw_fb_gk20a.h index 0234265a..46846b21 100644 --- a/drivers/gpu/nvgpu/gk20a/hw_fb_gk20a.h +++ b/drivers/gpu/nvgpu/gk20a/hw_fb_gk20a.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2012-2015, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2012-2016, NVIDIA CORPORATION. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms and conditions of the GNU General Public License, @@ -86,6 +86,10 @@ static inline u32 fb_mmu_invalidate_pdb_aperture_vid_mem_f(void) { return 0x0; } +static inline u32 fb_mmu_invalidate_pdb_aperture_sys_mem_f(void) +{ + return 0x2; +} static inline u32 fb_mmu_invalidate_pdb_addr_f(u32 v) { return (v & 0xfffffff) << 4; @@ -146,6 +150,14 @@ static inline u32 fb_mmu_debug_wr_aperture_vid_mem_f(void) { return 0x0; } +static inline u32 fb_mmu_debug_wr_aperture_sys_mem_coh_f(void) +{ + return 0x2; +} +static inline u32 fb_mmu_debug_wr_aperture_sys_mem_ncoh_f(void) +{ + return 0x3; +} static inline u32 fb_mmu_debug_wr_vol_false_f(void) { return 0x0; @@ -174,6 +186,14 @@ static inline u32 fb_mmu_debug_rd_aperture_vid_mem_f(void) { return 0x0; } +static inline u32 fb_mmu_debug_rd_aperture_sys_mem_coh_f(void) +{ + return 0x2; +} +static inline u32 fb_mmu_debug_rd_aperture_sys_mem_ncoh_f(void) +{ + return 0x3; +} static inline u32 fb_mmu_debug_rd_vol_false_f(void) { return 0x0; diff --git a/drivers/gpu/nvgpu/gk20a/hw_fifo_gk20a.h b/drivers/gpu/nvgpu/gk20a/hw_fifo_gk20a.h index 99d92782..07e2b4f8 100644 --- a/drivers/gpu/nvgpu/gk20a/hw_fifo_gk20a.h +++ b/drivers/gpu/nvgpu/gk20a/hw_fifo_gk20a.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2012-2015, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2012-2016, NVIDIA CORPORATION. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms and conditions of the GNU General Public License, @@ -82,6 +82,14 @@ static inline u32 fifo_runlist_base_target_vid_mem_f(void) { return 0x0; } +static inline u32 fifo_runlist_base_target_sys_mem_coh_f(void) +{ + return 0x20000000; +} +static inline u32 fifo_runlist_base_target_sys_mem_ncoh_f(void) +{ + return 0x30000000; +} static inline u32 fifo_runlist_r(void) { return 0x00002274; diff --git a/drivers/gpu/nvgpu/gk20a/hw_gmmu_gk20a.h b/drivers/gpu/nvgpu/gk20a/hw_gmmu_gk20a.h index d92f0d58..9b444036 100644 --- a/drivers/gpu/nvgpu/gk20a/hw_gmmu_gk20a.h +++ b/drivers/gpu/nvgpu/gk20a/hw_gmmu_gk20a.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2012-2015, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2012-2016, NVIDIA CORPORATION. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms and conditions of the GNU General Public License, @@ -62,6 +62,14 @@ static inline u32 gmmu_pde_aperture_big_video_memory_f(void) { return 0x1; } +static inline u32 gmmu_pde_aperture_big_sys_mem_coh_f(void) +{ + return 0x2; +} +static inline u32 gmmu_pde_aperture_big_sys_mem_ncoh_f(void) +{ + return 0x3; +} static inline u32 gmmu_pde_size_w(void) { return 0; @@ -90,6 +98,14 @@ static inline u32 gmmu_pde_aperture_small_video_memory_f(void) { return 0x1; } +static inline u32 gmmu_pde_aperture_small_sys_mem_coh_f(void) +{ + return 0x2; +} +static inline u32 gmmu_pde_aperture_small_sys_mem_ncoh_f(void) +{ + return 0x3; +} static inline u32 gmmu_pde_vol_small_w(void) { return 1; @@ -186,6 +202,14 @@ static inline u32 gmmu_pte_aperture_video_memory_f(void) { return 0x0; } +static inline u32 gmmu_pte_aperture_sys_mem_coh_f(void) +{ + return 0x4; +} +static inline u32 gmmu_pte_aperture_sys_mem_ncoh_f(void) +{ + return 0x6; +} static inline u32 gmmu_pte_read_only_w(void) { return 0; diff --git a/drivers/gpu/nvgpu/gk20a/hw_gr_gk20a.h b/drivers/gpu/nvgpu/gk20a/hw_gr_gk20a.h index a3ae664f..48aa1524 100644 --- a/drivers/gpu/nvgpu/gk20a/hw_gr_gk20a.h +++ b/drivers/gpu/nvgpu/gk20a/hw_gr_gk20a.h @@ -826,6 +826,14 @@ static inline u32 gr_fecs_current_ctx_target_vid_mem_f(void) { return 0x0; } +static inline u32 gr_fecs_current_ctx_target_sys_mem_coh_f(void) +{ + return 0x20000000; +} +static inline u32 gr_fecs_current_ctx_target_sys_mem_ncoh_f(void) +{ + return 0x30000000; +} static inline u32 gr_fecs_current_ctx_valid_s(void) { return 1; diff --git a/drivers/gpu/nvgpu/gk20a/hw_pbdma_gk20a.h b/drivers/gpu/nvgpu/gk20a/hw_pbdma_gk20a.h index 79a4ef96..09cfc084 100644 --- a/drivers/gpu/nvgpu/gk20a/hw_pbdma_gk20a.h +++ b/drivers/gpu/nvgpu/gk20a/hw_pbdma_gk20a.h @@ -334,6 +334,14 @@ static inline u32 pbdma_userd_target_vid_mem_f(void) { return 0x0; } +static inline u32 pbdma_userd_target_sys_mem_coh_f(void) +{ + return 0x2; +} +static inline u32 pbdma_userd_target_sys_mem_ncoh_f(void) +{ + return 0x3; +} static inline u32 pbdma_userd_addr_f(u32 v) { return (v & 0x7fffff) << 9; diff --git a/drivers/gpu/nvgpu/gk20a/hw_pwr_gk20a.h b/drivers/gpu/nvgpu/gk20a/hw_pwr_gk20a.h index 35312bd4..ab1eb184 100644 --- a/drivers/gpu/nvgpu/gk20a/hw_pwr_gk20a.h +++ b/drivers/gpu/nvgpu/gk20a/hw_pwr_gk20a.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2012-2014, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2012-2016, NVIDIA CORPORATION. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms and conditions of the GNU General Public License, @@ -494,6 +494,10 @@ static inline u32 pwr_pmu_new_instblk_target_sys_coh_f(void) { return 0x20000000; } +static inline u32 pwr_pmu_new_instblk_target_sys_ncoh_f(void) +{ + return 0x30000000; +} static inline u32 pwr_pmu_new_instblk_valid_f(u32 v) { return (v & 0x1) << 30; diff --git a/drivers/gpu/nvgpu/gk20a/hw_ram_gk20a.h b/drivers/gpu/nvgpu/gk20a/hw_ram_gk20a.h index 0f4f6726..0009be33 100644 --- a/drivers/gpu/nvgpu/gk20a/hw_ram_gk20a.h +++ b/drivers/gpu/nvgpu/gk20a/hw_ram_gk20a.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2012-2014, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2012-2016, NVIDIA CORPORATION. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms and conditions of the GNU General Public License, @@ -70,6 +70,14 @@ static inline u32 ram_in_page_dir_base_target_vid_mem_f(void) { return 0x0; } +static inline u32 ram_in_page_dir_base_target_sys_mem_coh_f(void) +{ + return 0x2; +} +static inline u32 ram_in_page_dir_base_target_sys_mem_ncoh_f(void) +{ + return 0x3; +} static inline u32 ram_in_page_dir_base_vol_w(void) { return 128; diff --git a/drivers/gpu/nvgpu/gk20a/mm_gk20a.c b/drivers/gpu/nvgpu/gk20a/mm_gk20a.c index 519faeeb..5c3f83a6 100644 --- a/drivers/gpu/nvgpu/gk20a/mm_gk20a.c +++ b/drivers/gpu/nvgpu/gk20a/mm_gk20a.c @@ -497,7 +497,9 @@ int gk20a_init_mm_setup_hw(struct gk20a *g) gk20a_dbg_info("bar1 inst block ptr: 0x%08x", (u32)inst_pa); gk20a_writel(g, bus_bar1_block_r(), - bus_bar1_block_target_vid_mem_f() | + (g->mm.vidmem_is_vidmem ? + bus_bar1_block_target_sys_mem_ncoh_f() : + bus_bar1_block_target_vid_mem_f()) | bus_bar1_block_mode_virtual_f() | bus_bar1_block_ptr_f(inst_pa)); @@ -2271,19 +2273,23 @@ u64 gk20a_mm_iova_addr(struct gk20a *g, struct scatterlist *sgl, } /* for gk20a the "video memory" apertures here are misnomers. */ -static inline u32 big_valid_pde0_bits(u64 pte_addr) +static inline u32 big_valid_pde0_bits(struct gk20a *g, u64 pte_addr) { u32 pde0_bits = - gmmu_pde_aperture_big_video_memory_f() | + (g->mm.vidmem_is_vidmem ? + gmmu_pde_aperture_big_sys_mem_ncoh_f() : + gmmu_pde_aperture_big_video_memory_f()) | gmmu_pde_address_big_sys_f( (u32)(pte_addr >> gmmu_pde_address_shift_v())); return pde0_bits; } -static inline u32 small_valid_pde1_bits(u64 pte_addr) +static inline u32 small_valid_pde1_bits(struct gk20a *g, u64 pte_addr) { u32 pde1_bits = - gmmu_pde_aperture_small_video_memory_f() | + (g->mm.vidmem_is_vidmem ? + gmmu_pde_aperture_small_sys_mem_ncoh_f() : + gmmu_pde_aperture_small_video_memory_f()) | gmmu_pde_vol_small_true_f() | /* tbd: why? */ gmmu_pde_address_small_sys_f( (u32)(pte_addr >> gmmu_pde_address_shift_v())); @@ -2325,11 +2331,11 @@ static int update_gmmu_pde_locked(struct vm_gk20a *vm, pte_addr_big = g->ops.mm.get_iova_addr(g, entry->sgt->sgl, 0); pde_v[0] = gmmu_pde_size_full_f(); - pde_v[0] |= big_valid ? big_valid_pde0_bits(pte_addr_big) : + pde_v[0] |= big_valid ? big_valid_pde0_bits(g, pte_addr_big) : (gmmu_pde_aperture_big_invalid_f()); pde_v[1] |= (small_valid ? - small_valid_pde1_bits(pte_addr_small) : + small_valid_pde1_bits(g, pte_addr_small) : (gmmu_pde_aperture_small_invalid_f() | gmmu_pde_vol_small_false_f())) | @@ -2374,7 +2380,9 @@ static int update_gmmu_pte_locked(struct vm_gk20a *vm, if (priv) pte_w[0] |= gmmu_pte_privilege_true_f(); - pte_w[1] = gmmu_pte_aperture_video_memory_f() | + pte_w[1] = (g->mm.vidmem_is_vidmem ? + gmmu_pte_aperture_sys_mem_ncoh_f() : + gmmu_pte_aperture_video_memory_f()) | gmmu_pte_kind_f(kind_v) | gmmu_pte_comptagline_f((u32)(*ctag >> ctag_shift)); @@ -3482,7 +3490,9 @@ void gk20a_mm_init_pdb(struct gk20a *g, void *inst_ptr, u64 pdb_addr) u32 pdb_addr_hi = u64_hi32(pdb_addr); gk20a_mem_wr32(inst_ptr, ram_in_page_dir_base_lo_w(), - ram_in_page_dir_base_target_vid_mem_f() | + (g->mm.vidmem_is_vidmem ? + ram_in_page_dir_base_target_sys_mem_ncoh_f() : + ram_in_page_dir_base_target_vid_mem_f()) | ram_in_page_dir_base_vol_true_f() | ram_in_page_dir_base_lo_f(pdb_addr_lo)); @@ -3774,7 +3784,9 @@ void gk20a_mm_tlb_invalidate(struct vm_gk20a *vm) gk20a_writel(g, fb_mmu_invalidate_pdb_r(), fb_mmu_invalidate_pdb_addr_f(addr_lo) | - fb_mmu_invalidate_pdb_aperture_vid_mem_f()); + (g->mm.vidmem_is_vidmem ? + fb_mmu_invalidate_pdb_aperture_sys_mem_f() : + fb_mmu_invalidate_pdb_aperture_vid_mem_f())); gk20a_writel(g, fb_mmu_invalidate_r(), fb_mmu_invalidate_all_va_true_f() | diff --git a/drivers/gpu/nvgpu/gk20a/mm_gk20a.h b/drivers/gpu/nvgpu/gk20a/mm_gk20a.h index 567369bc..2d137bbe 100644 --- a/drivers/gpu/nvgpu/gk20a/mm_gk20a.h +++ b/drivers/gpu/nvgpu/gk20a/mm_gk20a.h @@ -357,6 +357,8 @@ struct mm_gk20a { bool disable_bigpage; #endif bool has_physical_mode; + /* false if vidmem aperture actually points to sysmem */ + bool vidmem_is_vidmem; }; int gk20a_mm_init(struct mm_gk20a *mm); -- cgit v1.2.2