From 79a79b8ae6987e5620c9bc7ee080fe637a6ca57b Mon Sep 17 00:00:00 2001 From: Mahantesh Kumbar Date: Wed, 5 Jul 2017 16:12:29 +0530 Subject: gpu: nvgpu: falcon bootstrap support - Added falcon interface/HAL to bootstrap falcon by taking boot vector as parameter - Replaced falcon bootstrap code in multiple files with nvgpu_flcn_bootstrap() method JIRA NVGPU-102 Change-Id: I4324824c50c6196d8b7ecf981f815ec778da2fd9 Signed-off-by: Mahantesh Kumbar Reviewed-on: https://git-master/r/1513643 Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit Reviewed-by: Vijayakumar Subbu --- drivers/gpu/nvgpu/gk20a/flcn_gk20a.c | 23 ++++++++++++++++++++++- drivers/gpu/nvgpu/gk20a/pmu_gk20a.c | 7 ++----- 2 files changed, 24 insertions(+), 6 deletions(-) (limited to 'drivers/gpu/nvgpu/gk20a') diff --git a/drivers/gpu/nvgpu/gk20a/flcn_gk20a.c b/drivers/gpu/nvgpu/gk20a/flcn_gk20a.c index 158f4d8b..0ef10a56 100644 --- a/drivers/gpu/nvgpu/gk20a/flcn_gk20a.c +++ b/drivers/gpu/nvgpu/gk20a/flcn_gk20a.c @@ -324,6 +324,26 @@ static int gk20a_flcn_copy_to_imem(struct nvgpu_falcon *flcn, u32 dst, return 0; } +static int gk20a_falcon_bootstrap(struct nvgpu_falcon *flcn, + u32 boot_vector) +{ + struct gk20a *g = flcn->g; + u32 base_addr = flcn->flcn_base; + + nvgpu_log_info(g, "boot vec 0x%x", boot_vector); + + gk20a_writel(g, base_addr + falcon_falcon_dmactl_r(), + falcon_falcon_dmactl_require_ctx_f(0)); + + gk20a_writel(g, base_addr + falcon_falcon_bootvec_r(), + falcon_falcon_bootvec_vec_f(boot_vector)); + + gk20a_writel(g, base_addr + falcon_falcon_cpuctl_r(), + falcon_falcon_cpuctl_startcpu_f(1)); + + return 0; +} + static void gk20a_falcon_engine_dependency_ops(struct nvgpu_falcon *flcn) { struct nvgpu_falcon_engine_dependency_ops *flcn_eng_dep_ops = @@ -357,6 +377,7 @@ void gk20a_falcon_ops(struct nvgpu_falcon *flcn) flcn_ops->copy_from_dmem = gk20a_flcn_copy_from_dmem; flcn_ops->copy_to_dmem = gk20a_flcn_copy_to_dmem; flcn_ops->copy_to_imem = gk20a_flcn_copy_to_imem; + flcn_ops->bootstrap = gk20a_falcon_bootstrap; gk20a_falcon_engine_dependency_ops(flcn); } @@ -396,7 +417,7 @@ static void gk20a_falcon_hal_sw_init(struct nvgpu_falcon *flcn) nvgpu_mutex_init(&flcn->copy_lock); gk20a_falcon_ops(flcn); } else - nvgpu_info(g, "falcon 0x%x not supported on %s", + nvgpu_log_info(g, "falcon 0x%x not supported on %s", flcn->flcn_id, g->name); } diff --git a/drivers/gpu/nvgpu/gk20a/pmu_gk20a.c b/drivers/gpu/nvgpu/gk20a/pmu_gk20a.c index b3cacb86..7cf8c475 100644 --- a/drivers/gpu/nvgpu/gk20a/pmu_gk20a.c +++ b/drivers/gpu/nvgpu/gk20a/pmu_gk20a.c @@ -23,6 +23,7 @@ #include #include #include +#include #include "gk20a.h" #include "gr_gk20a.h" @@ -239,11 +240,7 @@ int pmu_bootstrap(struct nvgpu_pmu *pmu) pwr_falcon_dmatrfcmd_ctxdma_f(GK20A_PMU_DMAIDX_UCODE)); } - gk20a_writel(g, pwr_falcon_bootvec_r(), - pwr_falcon_bootvec_vec_f(desc->bootloader_entry_point)); - - gk20a_writel(g, pwr_falcon_cpuctl_r(), - pwr_falcon_cpuctl_startcpu_f(1)); + nvgpu_flcn_bootstrap(g->pmu.flcn, desc->bootloader_entry_point); gk20a_writel(g, pwr_falcon_os_r(), desc->app_version); -- cgit v1.2.2