From 6c33a010d8e3983cc3504e073cd552f952440aa1 Mon Sep 17 00:00:00 2001 From: Thomas Fleury Date: Wed, 7 Mar 2018 09:23:53 -0800 Subject: gpu: nvgpu: add placeholder for IPA to PA Add __nvgpu_sgl_phys function that can be used to implement IPA to PA translation in a subsequent change. Adapt existing function prototypes to add pointer to gpu context, as we will need to check if IPA to PA translation is needed. JIRA EVLR-2442 Bug 200392719 Change-Id: I5a734c958c8277d1bf673c020dafb31263f142d6 Signed-off-by: Thomas Fleury Reviewed-on: https://git-master.nvidia.com/r/1673142 Reviewed-by: mobile promotions Tested-by: mobile promotions --- drivers/gpu/nvgpu/gk20a/fifo_gk20a.c | 5 +++-- drivers/gpu/nvgpu/gk20a/pramin_gk20a.c | 4 ++-- 2 files changed, 5 insertions(+), 4 deletions(-) (limited to 'drivers/gpu/nvgpu/gk20a') diff --git a/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c b/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c index 0def724d..5bd4dc57 100644 --- a/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c +++ b/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c @@ -867,6 +867,7 @@ static int gk20a_init_fifo_setup_sw(struct gk20a *g) struct fifo_gk20a *f = &g->fifo; unsigned int chid, i; int err = 0; + u64 userd_base; gk20a_dbg_fn(""); @@ -929,9 +930,9 @@ static int gk20a_init_fifo_setup_sw(struct gk20a *g) } gk20a_dbg(gpu_dbg_map, "userd gpu va = 0x%llx", f->userd.gpu_va); + userd_base = nvgpu_mem_get_addr(g, &f->userd); for (chid = 0; chid < f->num_channels; chid++) { - f->channel[chid].userd_iova = - nvgpu_mem_get_addr(g, &f->userd) + + f->channel[chid].userd_iova = userd_base + chid * f->userd_entry_size; f->channel[chid].userd_gpu_va = f->userd.gpu_va + chid * f->userd_entry_size; diff --git a/drivers/gpu/nvgpu/gk20a/pramin_gk20a.c b/drivers/gpu/nvgpu/gk20a/pramin_gk20a.c index 67fd2480..a76e2580 100644 --- a/drivers/gpu/nvgpu/gk20a/pramin_gk20a.c +++ b/drivers/gpu/nvgpu/gk20a/pramin_gk20a.c @@ -34,7 +34,7 @@ u32 gk20a_pramin_enter(struct gk20a *g, struct nvgpu_mem *mem, struct nvgpu_sgt *sgt, struct nvgpu_sgl *sgl, u32 w) { - u64 bufbase = nvgpu_sgt_get_phys(sgt, sgl); + u64 bufbase = nvgpu_sgt_get_phys(g, sgt, sgl); u64 addr = bufbase + w * sizeof(u32); u32 hi = (u32)((addr & ~(u64)0xfffff) >> bus_bar0_window_target_bar0_window_base_shift_v()); @@ -48,7 +48,7 @@ u32 gk20a_pramin_enter(struct gk20a *g, struct nvgpu_mem *mem, gk20a_dbg(gpu_dbg_mem, "0x%08x:%08x begin for %p,%p at [%llx,%llx] (sz %llx)", hi, lo, mem, sgl, bufbase, - bufbase + nvgpu_sgt_get_phys(sgt, sgl), + bufbase + nvgpu_sgt_get_phys(g, sgt, sgl), nvgpu_sgt_get_length(sgt, sgl)); WARN_ON(!bufbase); -- cgit v1.2.2