From 6b90684ceec6c32aed7491a059b3972b1f1be5f4 Mon Sep 17 00:00:00 2001 From: Thomas Fleury Date: Sat, 30 Dec 2017 13:04:19 -0800 Subject: gpu: nvgpu: vgpu: get virtual SMs mapping On gv11b we can have multiple SMs per TPC. Add sm_per_tpc in vgpu constants to properly dimension the virtual SM to TPC/GPC mapping in virtualization case. Use TEGRA_VGPU_CMD_GET_SMS_MAPPING to query current mapping. Bug 2039676 Change-Id: I817be18f9a28cfb9bd8af207d7d6341a2ec3994b Signed-off-by: Thomas Fleury Reviewed-on: https://git-master.nvidia.com/r/1631203 Reviewed-by: mobile promotions Tested-by: mobile promotions --- drivers/gpu/nvgpu/gk20a/gk20a.h | 2 +- drivers/gpu/nvgpu/gk20a/gr_gk20a.c | 11 ++++++++--- drivers/gpu/nvgpu/gk20a/gr_gk20a.h | 2 +- 3 files changed, 10 insertions(+), 5 deletions(-) (limited to 'drivers/gpu/nvgpu/gk20a') diff --git a/drivers/gpu/nvgpu/gk20a/gk20a.h b/drivers/gpu/nvgpu/gk20a/gk20a.h index a1c9c2bd..4f05ba8f 100644 --- a/drivers/gpu/nvgpu/gk20a/gk20a.h +++ b/drivers/gpu/nvgpu/gk20a/gk20a.h @@ -392,7 +392,7 @@ struct gpu_ops { void (*update_boosted_ctx)(struct gk20a *g, struct nvgpu_mem *mem, struct gr_ctx_desc *gr_ctx); - void (*init_sm_id_table)(struct gk20a *g); + int (*init_sm_id_table)(struct gk20a *g); int (*load_smid_config)(struct gk20a *g); void (*program_sm_id_numbering)(struct gk20a *g, u32 gpc, u32 tpc, u32 smid); diff --git a/drivers/gpu/nvgpu/gk20a/gr_gk20a.c b/drivers/gpu/nvgpu/gk20a/gr_gk20a.c index 11054087..0f6bebe7 100644 --- a/drivers/gpu/nvgpu/gk20a/gr_gk20a.c +++ b/drivers/gpu/nvgpu/gk20a/gr_gk20a.c @@ -1,7 +1,7 @@ /* * GK20A Graphics * - * Copyright (c) 2011-2017, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2011-2018, NVIDIA CORPORATION. All rights reserved. * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), @@ -1137,7 +1137,7 @@ static inline u32 count_bits(u32 mask) return count; } -void gr_gk20a_init_sm_id_table(struct gk20a *g) +int gr_gk20a_init_sm_id_table(struct gk20a *g) { u32 gpc, tpc; u32 sm_id = 0; @@ -1156,6 +1156,7 @@ void gr_gk20a_init_sm_id_table(struct gk20a *g) } } g->gr.no_of_sm = sm_id; + return 0; } /* @@ -1178,11 +1179,15 @@ int gr_gk20a_init_fs_state(struct gk20a *g) u32 tpc_per_gpc; u32 fuse_tpc_mask; u32 reg_index; + int err; gk20a_dbg_fn(""); if (g->ops.gr.init_sm_id_table) { - g->ops.gr.init_sm_id_table(g); + err = g->ops.gr.init_sm_id_table(g); + if (err) + return err; + /* Is table empty ? */ if (g->gr.no_of_sm == 0) return -EINVAL; diff --git a/drivers/gpu/nvgpu/gk20a/gr_gk20a.h b/drivers/gpu/nvgpu/gk20a/gr_gk20a.h index b6d5c14b..1c22923b 100644 --- a/drivers/gpu/nvgpu/gk20a/gr_gk20a.h +++ b/drivers/gpu/nvgpu/gk20a/gr_gk20a.h @@ -766,7 +766,7 @@ u32 gr_gk20a_tpc_enabled_exceptions(struct gk20a *g); int gr_gk20a_commit_global_timeslice(struct gk20a *g, struct channel_gk20a *c); -void gr_gk20a_init_sm_id_table(struct gk20a *g); +int gr_gk20a_init_sm_id_table(struct gk20a *g); int gr_gk20a_commit_inst(struct channel_gk20a *c, u64 gpu_va); -- cgit v1.2.2