From 5c5b52dce54fa09d16ae38a232a0e17b4729b472 Mon Sep 17 00:00:00 2001 From: Terje Bergstrom Date: Fri, 13 Oct 2017 08:13:45 -0700 Subject: gpu: nvgpu: Use internal nvgpu_warpstate Replace use of ioctl structure warpstate with internal nvgpu_warptate. JIRA NVGPU-259 Change-Id: I5170364d0443235cee471b87fa332fc09588f5d3 Signed-off-by: Terje Bergstrom Reviewed-on: https://git-master.nvidia.com/r/1578684 Reviewed-by: mobile promotions Tested-by: mobile promotions --- drivers/gpu/nvgpu/gk20a/gk20a.h | 5 +++-- drivers/gpu/nvgpu/gk20a/gr_gk20a.c | 2 +- drivers/gpu/nvgpu/gk20a/gr_gk20a.h | 9 ++++++++- 3 files changed, 12 insertions(+), 4 deletions(-) (limited to 'drivers/gpu/nvgpu/gk20a') diff --git a/drivers/gpu/nvgpu/gk20a/gk20a.h b/drivers/gpu/nvgpu/gk20a/gk20a.h index 8efb009a..ead1f69e 100644 --- a/drivers/gpu/nvgpu/gk20a/gk20a.h +++ b/drivers/gpu/nvgpu/gk20a/gk20a.h @@ -41,6 +41,7 @@ struct nvgpu_clk_pll_debug_data; struct nvgpu_nvhost_dev; struct nvgpu_cpu_time_correlation_sample; struct nvgpu_mem_sgt; +struct nvgpu_warpstate; #include #include @@ -308,7 +309,7 @@ struct gpu_ops { int (*set_sm_debug_mode)(struct gk20a *g, struct channel_gk20a *ch, u64 sms, bool enable); void (*bpt_reg_info)(struct gk20a *g, - struct warpstate *w_state); + struct nvgpu_warpstate *w_state); void (*get_access_map)(struct gk20a *g, u32 **whitelist, int *num_entries); int (*handle_fecs_error)(struct gk20a *g, @@ -407,7 +408,7 @@ struct gpu_ops { void (*load_tpc_mask)(struct gk20a *g); int (*inval_icache)(struct gk20a *g, struct channel_gk20a *ch); int (*trigger_suspend)(struct gk20a *g); - int (*wait_for_pause)(struct gk20a *g, struct warpstate *w_state); + int (*wait_for_pause)(struct gk20a *g, struct nvgpu_warpstate *w_state); int (*resume_from_pause)(struct gk20a *g); int (*clear_sm_errors)(struct gk20a *g); u32 (*tpc_enabled_exceptions)(struct gk20a *g); diff --git a/drivers/gpu/nvgpu/gk20a/gr_gk20a.c b/drivers/gpu/nvgpu/gk20a/gr_gk20a.c index 6f829282..1ade6b6a 100644 --- a/drivers/gpu/nvgpu/gk20a/gr_gk20a.c +++ b/drivers/gpu/nvgpu/gk20a/gr_gk20a.c @@ -8488,7 +8488,7 @@ int gr_gk20a_trigger_suspend(struct gk20a *g) return err; } -int gr_gk20a_wait_for_pause(struct gk20a *g, struct warpstate *w_state) +int gr_gk20a_wait_for_pause(struct gk20a *g, struct nvgpu_warpstate *w_state) { int err = 0; struct gr_gk20a *gr = &g->gr; diff --git a/drivers/gpu/nvgpu/gk20a/gr_gk20a.h b/drivers/gpu/nvgpu/gk20a/gr_gk20a.h index a78f0498..5fab43ca 100644 --- a/drivers/gpu/nvgpu/gk20a/gr_gk20a.h +++ b/drivers/gpu/nvgpu/gk20a/gr_gk20a.h @@ -51,6 +51,7 @@ #define GK20A_TIMEOUT_FPGA 100000 /* 100 sec */ struct channel_gk20a; +struct nvgpu_warpstate; enum /* global_ctx_buffer */ { CIRCULAR = 0, @@ -488,6 +489,12 @@ struct fecs_method_op_gk20a { }; +struct nvgpu_warpstate { + u64 valid_warps[2]; + u64 trapped_warps[2]; + u64 paused_warps[2]; +}; + struct gpu_ops; int gr_gk20a_load_golden_ctx_image(struct gk20a *g, struct channel_gk20a *c); @@ -718,7 +725,7 @@ void gk20a_gr_enable_gpc_exceptions(struct gk20a *g); void gk20a_gr_enable_exceptions(struct gk20a *g); int gr_gk20a_inval_icache(struct gk20a *g, struct channel_gk20a *ch); int gr_gk20a_trigger_suspend(struct gk20a *g); -int gr_gk20a_wait_for_pause(struct gk20a *g, struct warpstate *w_state); +int gr_gk20a_wait_for_pause(struct gk20a *g, struct nvgpu_warpstate *w_state); int gr_gk20a_resume_from_pause(struct gk20a *g); int gr_gk20a_clear_sm_errors(struct gk20a *g); u32 gr_gk20a_tpc_enabled_exceptions(struct gk20a *g); -- cgit v1.2.2