From 227c6f7b7a499dd58e0db6859736cfe586ef0897 Mon Sep 17 00:00:00 2001 From: Terje Bergstrom Date: Fri, 10 Aug 2018 14:09:36 -0700 Subject: gpu: nvgpu: Move fuse HAL to common Move implementation of fuse HAL to common/fuse. Also implements new fuse query functions for FBIO, FBP, TPC floorsweeping and security fuses. JIRA NVGPU-957 Change-Id: I55e256a4f1b59d50a721d4942907f70dc57467c4 Signed-off-by: Terje Bergstrom Reviewed-on: https://git-master.nvidia.com/r/1797177 --- drivers/gpu/nvgpu/gk20a/gk20a.h | 14 ++++++++++++++ 1 file changed, 14 insertions(+) (limited to 'drivers/gpu/nvgpu/gk20a') diff --git a/drivers/gpu/nvgpu/gk20a/gk20a.h b/drivers/gpu/nvgpu/gk20a/gk20a.h index 1fe0cb5d..febd7e0c 100644 --- a/drivers/gpu/nvgpu/gk20a/gk20a.h +++ b/drivers/gpu/nvgpu/gk20a/gk20a.h @@ -1256,6 +1256,20 @@ struct gpu_ops { int (*check_priv_security)(struct gk20a *g); bool (*is_opt_ecc_enable)(struct gk20a *g); bool (*is_opt_feature_override_disable)(struct gk20a *g); + u32 (*fuse_status_opt_fbio)(struct gk20a *g); + u32 (*fuse_status_opt_fbp)(struct gk20a *g); + u32 (*fuse_status_opt_rop_l2_fbp)(struct gk20a *g, u32 fbp); + u32 (*fuse_status_opt_tpc_gpc)(struct gk20a *g, u32 gpc); + void (*fuse_ctrl_opt_tpc_gpc)(struct gk20a *g, u32 gpc, u32 val); + u32 (*fuse_opt_sec_debug_en)(struct gk20a *g); + u32 (*fuse_opt_priv_sec_en)(struct gk20a *g); + u32 (*read_vin_cal_fuse_rev)(struct gk20a *g); + u32 (*read_vin_cal_slope_intercept_fuse)(struct gk20a *g, + u32 vin_id, u32 *slope, + u32 *intercept); + u32 (*read_vin_cal_gain_offset_fuse)(struct gk20a *g, + u32 vin_id, s8 *gain, + s8 *offset); } fuse; struct { int (*init)(struct gk20a *g); -- cgit v1.2.2