From 001c7c3185d9b087f89f48a41bee27d2d06721f6 Mon Sep 17 00:00:00 2001 From: Terje Bergstrom Date: Thu, 22 Jun 2017 12:55:17 -0700 Subject: gpu: nvgpu: Per chip default big page size Make default big page size query a HAL op instead of per-platform constant. This allows querying for default big page size without accessing Linux specific gk20a_platform structure. JIRA NVGPU-38 Change-Id: Ibfbd1319764fdae5fdb06700fb64d23f6f3dd01a Signed-off-by: Terje Bergstrom Reviewed-on: https://git-master/r/1507928 Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit --- drivers/gpu/nvgpu/gk20a/dbg_gpu_gk20a.c | 2 +- drivers/gpu/nvgpu/gk20a/gk20a.c | 2 +- drivers/gpu/nvgpu/gk20a/gk20a.h | 1 + drivers/gpu/nvgpu/gk20a/mm_gk20a.c | 8 ++++---- drivers/gpu/nvgpu/gk20a/platform_gk20a.h | 3 --- drivers/gpu/nvgpu/gk20a/platform_vgpu_tegra.c | 1 - 6 files changed, 7 insertions(+), 10 deletions(-) (limited to 'drivers/gpu/nvgpu/gk20a') diff --git a/drivers/gpu/nvgpu/gk20a/dbg_gpu_gk20a.c b/drivers/gpu/nvgpu/gk20a/dbg_gpu_gk20a.c index c7552f04..546d2eb1 100644 --- a/drivers/gpu/nvgpu/gk20a/dbg_gpu_gk20a.c +++ b/drivers/gpu/nvgpu/gk20a/dbg_gpu_gk20a.c @@ -1886,7 +1886,7 @@ static int gk20a_perfbuf_map(struct dbg_session_gk20a *dbg_s, struct mm_gk20a *mm = &g->mm; int err; u32 virt_size; - u32 big_page_size = gk20a_get_platform(g->dev)->default_big_page_size; + u32 big_page_size = g->ops.mm.get_default_big_page_size(); nvgpu_mutex_acquire(&g->dbg_sessions_lock); diff --git a/drivers/gpu/nvgpu/gk20a/gk20a.c b/drivers/gpu/nvgpu/gk20a/gk20a.c index 7506c1dd..a87d34f9 100644 --- a/drivers/gpu/nvgpu/gk20a/gk20a.c +++ b/drivers/gpu/nvgpu/gk20a/gk20a.c @@ -420,7 +420,7 @@ int gk20a_init_gpu_characteristics(struct gk20a *g) gpu->bus_type = NVGPU_GPU_BUS_TYPE_AXI; /* always AXI for now */ gpu->compression_page_size = g->ops.fb.compression_page_size(g); - gpu->big_page_size = platform->default_big_page_size; + gpu->big_page_size = g->ops.mm.get_default_big_page_size(); gpu->pde_coverage_bit_count = g->ops.mm.get_mmu_levels(g, gpu->big_page_size)[0].lo_bit[0]; diff --git a/drivers/gpu/nvgpu/gk20a/gk20a.h b/drivers/gpu/nvgpu/gk20a/gk20a.h index 9b28e0c6..1e6995c4 100644 --- a/drivers/gpu/nvgpu/gk20a/gk20a.h +++ b/drivers/gpu/nvgpu/gk20a/gk20a.h @@ -674,6 +674,7 @@ struct gpu_ops { void (*set_big_page_size)(struct gk20a *g, struct nvgpu_mem *mem, int size); u32 (*get_big_page_sizes)(void); + u32 (*get_default_big_page_size)(void); u32 (*get_physical_addr_bits)(struct gk20a *g); int (*init_mm_setup_hw)(struct gk20a *g); bool (*is_bar1_supported)(struct gk20a *g); diff --git a/drivers/gpu/nvgpu/gk20a/mm_gk20a.c b/drivers/gpu/nvgpu/gk20a/mm_gk20a.c index fa6b5109..52053c14 100644 --- a/drivers/gpu/nvgpu/gk20a/mm_gk20a.c +++ b/drivers/gpu/nvgpu/gk20a/mm_gk20a.c @@ -2124,7 +2124,7 @@ static int gk20a_init_bar1_vm(struct mm_gk20a *mm) int err; struct gk20a *g = gk20a_from_mm(mm); struct nvgpu_mem *inst_block = &mm->bar1.inst_block; - u32 big_page_size = gk20a_get_platform(g->dev)->default_big_page_size; + u32 big_page_size = g->ops.mm.get_default_big_page_size(); mm->bar1.aperture_size = bar1_aperture_size_mb_gk20a() << 20; gk20a_dbg_info("bar1 vm size = 0x%x", mm->bar1.aperture_size); @@ -2156,7 +2156,7 @@ static int gk20a_init_system_vm(struct mm_gk20a *mm) int err; struct gk20a *g = gk20a_from_mm(mm); struct nvgpu_mem *inst_block = &mm->pmu.inst_block; - u32 big_page_size = gk20a_get_platform(g->dev)->default_big_page_size; + u32 big_page_size = g->ops.mm.get_default_big_page_size(); u32 low_hole, aperture_size; /* @@ -2207,7 +2207,7 @@ static int gk20a_init_hwpm(struct mm_gk20a *mm) static int gk20a_init_cde_vm(struct mm_gk20a *mm) { struct gk20a *g = gk20a_from_mm(mm); - u32 big_page_size = gk20a_get_platform(g->dev)->default_big_page_size; + u32 big_page_size = g->ops.mm.get_default_big_page_size(); mm->cde.vm = nvgpu_vm_init(g, big_page_size, big_page_size << 10, @@ -2222,7 +2222,7 @@ static int gk20a_init_cde_vm(struct mm_gk20a *mm) static int gk20a_init_ce_vm(struct mm_gk20a *mm) { struct gk20a *g = gk20a_from_mm(mm); - u32 big_page_size = gk20a_get_platform(g->dev)->default_big_page_size; + u32 big_page_size = g->ops.mm.get_default_big_page_size(); mm->ce.vm = nvgpu_vm_init(g, big_page_size, big_page_size << 10, diff --git a/drivers/gpu/nvgpu/gk20a/platform_gk20a.h b/drivers/gpu/nvgpu/gk20a/platform_gk20a.h index 3eda1da4..04ac2505 100644 --- a/drivers/gpu/nvgpu/gk20a/platform_gk20a.h +++ b/drivers/gpu/nvgpu/gk20a/platform_gk20a.h @@ -111,9 +111,6 @@ struct gk20a_platform { */ bool force_reset_in_do_idle; - /* Default big page size 64K or 128K */ - u32 default_big_page_size; - /* default pri timeout, on PCIe it should be lower than timeout * detection */ diff --git a/drivers/gpu/nvgpu/gk20a/platform_vgpu_tegra.c b/drivers/gpu/nvgpu/gk20a/platform_vgpu_tegra.c index 48b5a90a..bbf1092c 100644 --- a/drivers/gpu/nvgpu/gk20a/platform_vgpu_tegra.c +++ b/drivers/gpu/nvgpu/gk20a/platform_vgpu_tegra.c @@ -52,7 +52,6 @@ struct gk20a_platform vgpu_tegra_platform = { .ch_wdt_timeout_ms = 5000, .probe = gk20a_tegra_probe, - .default_big_page_size = SZ_128K, .clk_round_rate = vgpu_clk_round_rate, .get_clk_freqs = vgpu_clk_get_freqs, -- cgit v1.2.2