From bfe65407bde2b5d0776724301e215c6553c989f3 Mon Sep 17 00:00:00 2001 From: Vinod G Date: Tue, 7 Aug 2018 23:09:30 -0700 Subject: gpu: nvgpu: Read sm error ioctl support for tsg Add READ_SM_ERROR IOCTL support to TSG level. Moved the struct to save the sm_error details from gr to tsg as the sm_error support is context based, not global. Also corrected MISRA 21.1 error in header file. nvgpu_dbg_gpu_ioctl_write_single_sm_error_state and nvgpu_dbg_gpu_ioctl_read_single_sm_error_state functions are modified to use the tsg struct nvgpu_tsg_sm_error_state. Bug 200412642 Change-Id: I9e334b059078a4bb0e360b945444cc4bf1cc56ec Signed-off-by: Vinod G Reviewed-on: https://git-master.nvidia.com/r/1794856 Reviewed-by: svc-misra-checker GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom Reviewed-by: mobile promotions Tested-by: mobile promotions --- drivers/gpu/nvgpu/gk20a/tsg_gk20a.h | 21 ++++++++++++++++++--- 1 file changed, 18 insertions(+), 3 deletions(-) (limited to 'drivers/gpu/nvgpu/gk20a/tsg_gk20a.h') diff --git a/drivers/gpu/nvgpu/gk20a/tsg_gk20a.h b/drivers/gpu/nvgpu/gk20a/tsg_gk20a.h index 552c3bb3..67ccb9f5 100644 --- a/drivers/gpu/nvgpu/gk20a/tsg_gk20a.h +++ b/drivers/gpu/nvgpu/gk20a/tsg_gk20a.h @@ -19,8 +19,8 @@ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER * DEALINGS IN THE SOFTWARE. */ -#ifndef __TSG_GK20A_H_ -#define __TSG_GK20A_H_ +#ifndef TSG_GK20A_H +#define TSG_GK20A_H #include #include @@ -39,6 +39,14 @@ void gk20a_tsg_release(struct nvgpu_ref *ref); int gk20a_init_tsg_support(struct gk20a *g, u32 tsgid); struct tsg_gk20a *tsg_gk20a_from_ch(struct channel_gk20a *ch); +struct nvgpu_tsg_sm_error_state { + u32 hww_global_esr; + u32 hww_warp_esr; + u64 hww_warp_esr_pc; + u32 hww_global_esr_report_mask; + u32 hww_warp_esr_report_mask; +}; + struct tsg_gk20a { struct gk20a *g; @@ -69,6 +77,7 @@ struct tsg_gk20a { bool tpc_num_initialized; bool in_use; + struct nvgpu_tsg_sm_error_state *sm_error_states; }; int gk20a_enable_tsg(struct tsg_gk20a *tsg); @@ -84,6 +93,12 @@ int gk20a_tsg_set_timeslice(struct tsg_gk20a *tsg, u32 timeslice); u32 gk20a_tsg_get_timeslice(struct tsg_gk20a *tsg); int gk20a_tsg_set_priority(struct gk20a *g, struct tsg_gk20a *tsg, u32 priority); +int gk20a_tsg_alloc_sm_error_states_mem(struct gk20a *g, + struct tsg_gk20a *tsg, + u32 num_sm); +void gk20a_tsg_update_sm_error_state_locked(struct tsg_gk20a *tsg, + u32 sm_id, + struct nvgpu_tsg_sm_error_state *sm_error_state); struct gk20a_event_id_data { struct gk20a *g; @@ -106,4 +121,4 @@ gk20a_event_id_data_from_event_id_node(struct nvgpu_list_node *node) ((uintptr_t)node - offsetof(struct gk20a_event_id_data, event_id_node)); }; -#endif /* __TSG_GK20A_H_ */ +#endif /* TSG_GK20A_H */ -- cgit v1.2.2