From 2a58d3c27b45ca9d0d9dc2136377b7a41b9ed82d Mon Sep 17 00:00:00 2001 From: Aingara Paramakuru Date: Mon, 22 Feb 2016 12:35:49 -0500 Subject: gpu: nvgpu: improve channel interleave support Previously, only "high" priority bare channels were interleaved between all other bare channels and TSGs. This patch decouples priority from interleaving and introduces 3 levels for interleaving a bare channel or TSG: high, medium, and low. The levels define the number of times a channel or TSG will appear on a runlist (see nvgpu.h for details). By default, all bare channels and TSGs are set to interleave level low. Userspace can then request the interleave level to be increased via the CHANNEL_SET_RUNLIST_INTERLEAVE ioctl (TSG-specific ioctl will be added later). As timeslice settings will soon be coming from userspace, the default timeslice for "high" priority channels has been restored. JIRA VFND-1302 Bug 1729664 Change-Id: I178bc1cecda23f5002fec6d791e6dcaedfa05c0c Signed-off-by: Aingara Paramakuru Reviewed-on: http://git-master/r/1014962 Reviewed-by: Terje Bergstrom Tested-by: Terje Bergstrom --- drivers/gpu/nvgpu/gk20a/tsg_gk20a.h | 2 ++ 1 file changed, 2 insertions(+) (limited to 'drivers/gpu/nvgpu/gk20a/tsg_gk20a.h') diff --git a/drivers/gpu/nvgpu/gk20a/tsg_gk20a.h b/drivers/gpu/nvgpu/gk20a/tsg_gk20a.h index bcc4d0c4..7e0a75d1 100644 --- a/drivers/gpu/nvgpu/gk20a/tsg_gk20a.h +++ b/drivers/gpu/nvgpu/gk20a/tsg_gk20a.h @@ -49,6 +49,8 @@ struct tsg_gk20a { struct gr_ctx_desc *tsg_gr_ctx; struct vm_gk20a *vm; + + u32 interleave_level; }; int gk20a_enable_tsg(struct tsg_gk20a *tsg); -- cgit v1.2.2