From e4a131a98d47740098c554425c532a2e3e48274d Mon Sep 17 00:00:00 2001 From: Rajkumar Kasirajan Date: Thu, 9 Mar 2017 23:52:50 +0800 Subject: Revert "gpu: nvgpu: change stall intr handling order" This reverts commit 35f0cf0efefe4a64ee25a5b118338b15e552dcb0 as it caused lp0 suspend/resume failure. Bug 1886110 Change-Id: Ib62207650344180361b6529f716f77b84528cd56 Signed-off-by: Rajkumar Kasirajan Reviewed-on: http://git-master/r/1317986 Reviewed-by: mobile promotions Tested-by: mobile promotions --- drivers/gpu/nvgpu/gk20a/priv_ring_gk20a.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) (limited to 'drivers/gpu/nvgpu/gk20a/priv_ring_gk20a.c') diff --git a/drivers/gpu/nvgpu/gk20a/priv_ring_gk20a.c b/drivers/gpu/nvgpu/gk20a/priv_ring_gk20a.c index 90bd95ac..a44df1e8 100644 --- a/drivers/gpu/nvgpu/gk20a/priv_ring_gk20a.c +++ b/drivers/gpu/nvgpu/gk20a/priv_ring_gk20a.c @@ -76,6 +76,8 @@ void gk20a_priv_ring_isr(struct gk20a *g) u32 gpc_stride = nvgpu_get_litter_value(g, GPU_LIT_GPC_STRIDE); struct gk20a_platform *platform = dev_get_drvdata(g->dev); + if (platform->is_fmodel) + return; status0 = gk20a_readl(g, pri_ringmaster_intr_status0_r()); status1 = gk20a_readl(g, pri_ringmaster_intr_status1_r()); @@ -88,6 +90,7 @@ void gk20a_priv_ring_isr(struct gk20a *g) pri_ringmaster_intr_status0_overflow_fault_v(status0) != 0) { gk20a_reset_priv_ring(g); } + if (pri_ringmaster_intr_status0_gbl_write_error_sys_v(status0) != 0) { gk20a_dbg(gpu_dbg_intr, "SYS write error. ADR %08x WRDAT %08x INFO %08x, CODE %08x", gk20a_readl(g, pri_ringstation_sys_priv_error_adr_r()), @@ -106,9 +109,6 @@ void gk20a_priv_ring_isr(struct gk20a *g) } } - if (platform->is_fmodel) - return; - cmd = gk20a_readl(g, pri_ringmaster_command_r()); cmd = set_field(cmd, pri_ringmaster_command_cmd_m(), pri_ringmaster_command_cmd_ack_interrupt_f()); -- cgit v1.2.2