From 69d7652aaa9cf94873cccae13c7b6f6a4eb224af Mon Sep 17 00:00:00 2001 From: Terje Bergstrom Date: Thu, 25 Aug 2016 15:39:14 -0700 Subject: gpu: nvgpu: Dump error on priv ring intr Write an error to UART on priv ring error. This uncovers any accesses to missing registers or illegal accesses to registers. Bug 1846641 Change-Id: Ic1e5ecadcd95777f2b3f7bd77accf98ddce97282 Signed-off-by: Terje Bergstrom Reviewed-on: http://git-master/r/1294683 Reviewed-by: Konsta Holtta Reviewed-by: Seshendra Gadagottu --- drivers/gpu/nvgpu/gk20a/priv_ring_gk20a.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) (limited to 'drivers/gpu/nvgpu/gk20a/priv_ring_gk20a.c') diff --git a/drivers/gpu/nvgpu/gk20a/priv_ring_gk20a.c b/drivers/gpu/nvgpu/gk20a/priv_ring_gk20a.c index 1584ffda..239d8efd 100644 --- a/drivers/gpu/nvgpu/gk20a/priv_ring_gk20a.c +++ b/drivers/gpu/nvgpu/gk20a/priv_ring_gk20a.c @@ -80,7 +80,7 @@ void gk20a_priv_ring_isr(struct gk20a *g) status0 = gk20a_readl(g, pri_ringmaster_intr_status0_r()); status1 = gk20a_readl(g, pri_ringmaster_intr_status1_r()); - gk20a_dbg(gpu_dbg_intr, "ringmaster intr status0: 0x%08x," + nvgpu_err(g, "ringmaster intr status0: 0x%08x," "status1: 0x%08x", status0, status1); if (pri_ringmaster_intr_status0_ring_start_conn_fault_v(status0) != 0 || @@ -90,7 +90,7 @@ void gk20a_priv_ring_isr(struct gk20a *g) } if (pri_ringmaster_intr_status0_gbl_write_error_sys_v(status0) != 0) { - gk20a_dbg(gpu_dbg_intr, "SYS write error. ADR %08x WRDAT %08x INFO %08x, CODE %08x", + nvgpu_err(g, "SYS write error. ADR %08x WRDAT %08x INFO %08x, CODE %08x", gk20a_readl(g, pri_ringstation_sys_priv_error_adr_r()), gk20a_readl(g, pri_ringstation_sys_priv_error_wrdat_r()), gk20a_readl(g, pri_ringstation_sys_priv_error_info_r()), @@ -99,7 +99,7 @@ void gk20a_priv_ring_isr(struct gk20a *g) for (gpc = 0; gpc < g->gr.gpc_count; gpc++) { if (status1 & BIT(gpc)) { - gk20a_dbg(gpu_dbg_intr, "GPC%u write error. ADR %08x WRDAT %08x INFO %08x, CODE %08x", gpc, + nvgpu_err(g, "GPC%u write error. ADR %08x WRDAT %08x INFO %08x, CODE %08x", gpc, gk20a_readl(g, pri_ringstation_gpc_gpc0_priv_error_adr_r() + gpc * gpc_stride), gk20a_readl(g, pri_ringstation_gpc_gpc0_priv_error_wrdat_r() + gpc * gpc_stride), gk20a_readl(g, pri_ringstation_gpc_gpc0_priv_error_info_r() + gpc * gpc_stride), -- cgit v1.2.2