From 8522004c00264646feeb30ede3214f46ddbea04d Mon Sep 17 00:00:00 2001 From: Mahantesh Kumbar Date: Tue, 31 Jan 2017 20:39:21 +0530 Subject: gpu: nvgpu: Falcon-controller interface update Moved falcon-controller common interface code from pmu_common.h to flcnif_cmn.h file. Interfaces are common for falcons irrespective of F/W on falcon controllers Jira NVGPU-19 Change-Id: Iad11b2fade8cf6716888773b2b1c23919cbcc07b Signed-off-by: Mahantesh Kumbar Reviewed-on: http://git-master/r/1296695 Reviewed-by: mobile promotions Tested-by: mobile promotions --- drivers/gpu/nvgpu/gk20a/pmu_gk20a.h | 17 +---------------- 1 file changed, 1 insertion(+), 16 deletions(-) (limited to 'drivers/gpu/nvgpu/gk20a/pmu_gk20a.h') diff --git a/drivers/gpu/nvgpu/gk20a/pmu_gk20a.h b/drivers/gpu/nvgpu/gk20a/pmu_gk20a.h index 84377d0b..dc23005e 100644 --- a/drivers/gpu/nvgpu/gk20a/pmu_gk20a.h +++ b/drivers/gpu/nvgpu/gk20a/pmu_gk20a.h @@ -23,7 +23,7 @@ #include #include "pmu_api.h" -#include "pmu_common.h" +#include #include "pmuif/nvgpu_gpmu_cmdif.h" /* defined by pmu hw spec */ @@ -124,21 +124,6 @@ struct pmu_ucode_desc_v1 { u32 compressed; }; -#define PMU_DMEM_ALLOC_ALIGNMENT (4) -#define PMU_DMEM_ALIGNMENT (4) - -#define PMU_CMD_FLAGS_PMU_MASK (0xF0) - -#define PMU_CMD_FLAGS_STATUS BIT(0) -#define PMU_CMD_FLAGS_INTR BIT(1) -#define PMU_CMD_FLAGS_EVENT BIT(2) -#define PMU_CMD_FLAGS_WATERMARK BIT(3) - -#define PMU_MSG_HDR_SIZE sizeof(struct pmu_hdr) -#define PMU_CMD_HDR_SIZE sizeof(struct pmu_hdr) - - - /***************************** ACR ERROR CODES ******************************/ /*! * Error codes used in PMU-ACR Task -- cgit v1.2.2