From 69dee6a648ad434b75e1a9c64b022ee45d3ff87b Mon Sep 17 00:00:00 2001 From: Mahantesh Kumbar Date: Tue, 6 Jun 2017 15:26:32 +0530 Subject: gpu: nvgpu: reorganize PMU init - Moved PMU init code from pmu_gk20a.c to "drivers/gpu/nvgpu/common/pmu/pmu.c" file - Moved below related methods SW/HW init, init msg handler, deinit/destroy, PMU state machine -Created HAL methods to read message queue tail & supported mutex count. -prepend with nvgpu_ for pmu init global mehtods JIRA NVGPU-56 JIRA NVGPU-92 Change-Id: Iea9efc194fefa74fb5641d2b2f4633577d2c3a47 Signed-off-by: Mahantesh Kumbar Reviewed-on: http://git-master/r/1480002 Reviewed-by: svccoveritychecker GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom --- drivers/gpu/nvgpu/gk20a/pmu_gk20a.h | 17 +---------------- 1 file changed, 1 insertion(+), 16 deletions(-) (limited to 'drivers/gpu/nvgpu/gk20a/pmu_gk20a.h') diff --git a/drivers/gpu/nvgpu/gk20a/pmu_gk20a.h b/drivers/gpu/nvgpu/gk20a/pmu_gk20a.h index a53329b4..1c29b380 100644 --- a/drivers/gpu/nvgpu/gk20a/pmu_gk20a.h +++ b/drivers/gpu/nvgpu/gk20a/pmu_gk20a.h @@ -63,15 +63,6 @@ struct pmu_surface { struct flcn_mem_desc_v0 params; }; -/*PG defines used by nvpgu-pmu*/ -struct pmu_pg_stats_data { - u32 gating_cnt; - u32 ingating_time; - u32 ungating_time; - u32 avg_entry_latency_us; - u32 avg_exit_latency_us; -}; - #define PMU_PG_IDLE_THRESHOLD_SIM 1000 #define PMU_PG_POST_POWERUP_IDLE_THRESHOLD_SIM 4000000 /* TBD: QT or else ? */ @@ -105,10 +96,6 @@ struct pmu_pg_stats_data { #define APCTRL_MINIMUM_TARGET_SAVING_DEFAULT_US (10000) #define APCTRL_POWER_BREAKEVEN_DEFAULT_US (2000) #define APCTRL_CYCLES_PER_SAMPLE_MAX_DEFAULT (200) -/*PG defines used by nvpgu-pmu*/ - -int gk20a_init_pmu_support(struct gk20a *g); -int gk20a_init_pmu_bind_fecs(struct gk20a *g); bool gk20a_pmu_is_interrupted(struct nvgpu_pmu *pmu); void gk20a_pmu_isr(struct gk20a *g); @@ -131,8 +118,8 @@ int gk20a_pmu_queue_head(struct nvgpu_pmu *pmu, struct pmu_queue *queue, u32 *head, bool set); int gk20a_pmu_queue_tail(struct nvgpu_pmu *pmu, struct pmu_queue *queue, u32 *tail, bool set); +void gk20a_pmu_msgq_tail(struct nvgpu_pmu *pmu, u32 *tail, bool set); -int gk20a_pmu_destroy(struct gk20a *g); int gk20a_pmu_load_norm(struct gk20a *g, u32 *load); int gk20a_pmu_load_update(struct gk20a *g); void gk20a_pmu_reset_load_counters(struct gk20a *g); @@ -174,8 +161,6 @@ int gk20a_pmu_vidmem_surface_alloc(struct gk20a *g, struct nvgpu_mem *mem, u32 size); int gk20a_pmu_sysmem_surface_alloc(struct gk20a *g, struct nvgpu_mem *mem, u32 size); -int gk20a_pmu_get_pg_stats(struct gk20a *g, - u32 pg_engine_id, struct pmu_pg_stats_data *pg_stat_data); bool nvgpu_find_hex_in_string(char *strings, struct gk20a *g, u32 *hex_pos); int nvgpu_pmu_perfmon_start_sampling(struct nvgpu_pmu *pmu); -- cgit v1.2.2