From 1d2e66540a37f04add5694d7aee9350cf6f6a78d Mon Sep 17 00:00:00 2001 From: Terje Bergstrom Date: Thu, 2 Jun 2016 12:25:57 -0700 Subject: gpu: nvgpu: Fix calculation of timeout Fix calculation of timeout in multiple places. The #defines GR_IDLE_CHECK_DEFAULT and GR_IDLE_CHECK_MAX are meant to be used only for defining the frequency of checking for timeout. Using them for actual timeouts makes the timeout really short. Change-Id: I3d0f8cbc91d619be8e5a9168ee1ab1d6298f129b Signed-off-by: Terje Bergstrom Reviewed-on: http://git-master/r/1158269 --- drivers/gpu/nvgpu/gk20a/pmu_gk20a.c | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-) (limited to 'drivers/gpu/nvgpu/gk20a/pmu_gk20a.c') diff --git a/drivers/gpu/nvgpu/gk20a/pmu_gk20a.c b/drivers/gpu/nvgpu/gk20a/pmu_gk20a.c index b60d1b71..8ce7f32d 100644 --- a/drivers/gpu/nvgpu/gk20a/pmu_gk20a.c +++ b/drivers/gpu/nvgpu/gk20a/pmu_gk20a.c @@ -37,6 +37,9 @@ #define GK20A_PMU_UCODE_IMAGE "gpmu_ucode.bin" +#define PMU_MEM_SCRUBBING_TIMEOUT_MAX 1000 +#define PMU_MEM_SCRUBBING_TIMEOUT_DEFAULT 10 + #define gk20a_dbg_pmu(fmt, arg...) \ gk20a_dbg(gpu_dbg_pmu, fmt, ##arg) @@ -2119,7 +2122,8 @@ int pmu_enable_hw(struct pmu_gk20a *pmu, bool enable) gk20a_dbg_fn(""); if (enable) { - int retries = GR_IDLE_CHECK_MAX / GR_IDLE_CHECK_DEFAULT; + int retries = PMU_MEM_SCRUBBING_TIMEOUT_MAX / + PMU_MEM_SCRUBBING_TIMEOUT_DEFAULT; gk20a_enable(g, mc_enable_pwr_enabled_f()); if (g->ops.clock_gating.slcg_pmu_load_gating_prod) @@ -2138,7 +2142,7 @@ int pmu_enable_hw(struct pmu_gk20a *pmu, bool enable) gk20a_dbg_fn("done"); return 0; } - udelay(GR_IDLE_CHECK_DEFAULT); + udelay(PMU_MEM_SCRUBBING_TIMEOUT_DEFAULT); } while (--retries || !tegra_platform_is_silicon()); gk20a_disable(g, mc_enable_pwr_enabled_f()); -- cgit v1.2.2