From 19fdb429c2b04d13faecad8b2e5466e9f3c7b8c7 Mon Sep 17 00:00:00 2001 From: Terje Bergstrom Date: Wed, 29 Mar 2017 15:00:24 -0700 Subject: gpu: nvgpu: Wrappers for checking platform type Add nvgpu_* wrappers for determining if we're running in simulation or silicon, and if we're running in hypervisor. The new wrappers require struct gk20a pointer, and gk20a_fence_wait() did not have access to one. Add struct gk20a pointer as the first parameter. JIRA NVGPU-16 Change-Id: I73b2b8f091ca29fb1827054abd2adaf583710331 Signed-off-by: Terje Bergstrom Reviewed-on: http://git-master/r/1331565 Reviewed-by: mobile promotions Tested-by: mobile promotions --- drivers/gpu/nvgpu/gk20a/pmu_gk20a.c | 17 ++++------------- 1 file changed, 4 insertions(+), 13 deletions(-) (limited to 'drivers/gpu/nvgpu/gk20a/pmu_gk20a.c') diff --git a/drivers/gpu/nvgpu/gk20a/pmu_gk20a.c b/drivers/gpu/nvgpu/gk20a/pmu_gk20a.c index 38b8da9c..7df0c71c 100644 --- a/drivers/gpu/nvgpu/gk20a/pmu_gk20a.c +++ b/drivers/gpu/nvgpu/gk20a/pmu_gk20a.c @@ -3642,19 +3642,10 @@ static int pmu_pg_init_send(struct gk20a *g, u32 pg_engine_id) gk20a_dbg_fn(""); - if (tegra_cpu_is_asim()) { - /* TBD: calculate threshold for silicon */ - gk20a_writel(g, pwr_pmu_pg_idlefilth_r(pg_engine_id), - PMU_PG_IDLE_THRESHOLD_SIM); - gk20a_writel(g, pwr_pmu_pg_ppuidlefilth_r(pg_engine_id), - PMU_PG_POST_POWERUP_IDLE_THRESHOLD_SIM); - } else { - /* TBD: calculate threshold for silicon */ - gk20a_writel(g, pwr_pmu_pg_idlefilth_r(pg_engine_id), - PMU_PG_IDLE_THRESHOLD); - gk20a_writel(g, pwr_pmu_pg_ppuidlefilth_r(pg_engine_id), - PMU_PG_POST_POWERUP_IDLE_THRESHOLD); - } + gk20a_writel(g, pwr_pmu_pg_idlefilth_r(pg_engine_id), + PMU_PG_IDLE_THRESHOLD); + gk20a_writel(g, pwr_pmu_pg_ppuidlefilth_r(pg_engine_id), + PMU_PG_POST_POWERUP_IDLE_THRESHOLD); if (g->ops.pmu.pmu_pg_init_param) g->ops.pmu.pmu_pg_init_param(g, pg_engine_id); -- cgit v1.2.2