From de2dfd0c1ee5249f39ff58ce81cbdad0a5ad8cca Mon Sep 17 00:00:00 2001
From: Mahantesh Kumbar <mkumbar@nvidia.com>
Date: Wed, 1 Feb 2017 16:58:05 +0530
Subject: gpu: nvgpu: PMU perfmon interface header reorg

Moved perfmon interface from
pmu_api.h & pmu_gk20a.h to gpmuif_perfmon.h
header files

gpmuif_perfmon.h - PMU Command/Message Interfaces
PERFMON

Jira NVGPU-19

Change-Id: I983f89f0f6ec3b889d975178fb1405f166b7d1b9
Signed-off-by: Mahantesh Kumbar <mkumbar@nvidia.com>
Reviewed-on: http://git-master/r/1297262
Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
---
 drivers/gpu/nvgpu/gk20a/pmu_api.h | 137 --------------------------------------
 1 file changed, 137 deletions(-)

(limited to 'drivers/gpu/nvgpu/gk20a/pmu_api.h')

diff --git a/drivers/gpu/nvgpu/gk20a/pmu_api.h b/drivers/gpu/nvgpu/gk20a/pmu_api.h
index 6284f2f9..4d249524 100644
--- a/drivers/gpu/nvgpu/gk20a/pmu_api.h
+++ b/drivers/gpu/nvgpu/gk20a/pmu_api.h
@@ -17,143 +17,6 @@
 #include <nvgpu/flcnif_cmn.h>
 #include "pmuif/gpmuif_pg_rppg.h"
 
-/*---------------------------------------------------------*/
-
-/*perfmon task defines*/
-enum pmu_perfmon_cmd_start_fields {
-	COUNTER_ALLOC
-};
-
-enum {
-	PMU_PERFMON_CMD_ID_START = 0,
-	PMU_PERFMON_CMD_ID_STOP  = 1,
-	PMU_PERFMON_CMD_ID_INIT  = 2
-};
-
-struct pmu_perfmon_cmd_start_v3 {
-	u8 cmd_type;
-	u8 group_id;
-	u8 state_id;
-	u8 flags;
-	struct pmu_allocation_v3 counter_alloc;
-};
-
-struct pmu_perfmon_cmd_start_v2 {
-	u8 cmd_type;
-	u8 group_id;
-	u8 state_id;
-	u8 flags;
-	struct pmu_allocation_v2 counter_alloc;
-};
-
-struct pmu_perfmon_cmd_start_v1 {
-	u8 cmd_type;
-	u8 group_id;
-	u8 state_id;
-	u8 flags;
-	struct pmu_allocation_v1 counter_alloc;
-};
-
-struct pmu_perfmon_cmd_start_v0 {
-	u8 cmd_type;
-	u8 group_id;
-	u8 state_id;
-	u8 flags;
-	struct pmu_allocation_v0 counter_alloc;
-};
-
-struct pmu_perfmon_cmd_stop {
-	u8 cmd_type;
-};
-
-struct pmu_perfmon_cmd_init_v3 {
-	u8 cmd_type;
-	u8 to_decrease_count;
-	u8 base_counter_id;
-	u32 sample_period_us;
-	struct pmu_allocation_v3 counter_alloc;
-	u8 num_counters;
-	u8 samples_in_moving_avg;
-	u16 sample_buffer;
-};
-
-struct pmu_perfmon_cmd_init_v2 {
-	u8 cmd_type;
-	u8 to_decrease_count;
-	u8 base_counter_id;
-	u32 sample_period_us;
-	struct pmu_allocation_v2 counter_alloc;
-	u8 num_counters;
-	u8 samples_in_moving_avg;
-	u16 sample_buffer;
-};
-
-struct pmu_perfmon_cmd_init_v1 {
-	u8 cmd_type;
-	u8 to_decrease_count;
-	u8 base_counter_id;
-	u32 sample_period_us;
-	struct pmu_allocation_v1 counter_alloc;
-	u8 num_counters;
-	u8 samples_in_moving_avg;
-	u16 sample_buffer;
-};
-
-struct pmu_perfmon_cmd_init_v0 {
-	u8 cmd_type;
-	u8 to_decrease_count;
-	u8 base_counter_id;
-	u32 sample_period_us;
-	struct pmu_allocation_v0 counter_alloc;
-	u8 num_counters;
-	u8 samples_in_moving_avg;
-	u16 sample_buffer;
-};
-
-struct pmu_perfmon_cmd {
-	union {
-		u8 cmd_type;
-		struct pmu_perfmon_cmd_start_v0 start_v0;
-		struct pmu_perfmon_cmd_start_v1 start_v1;
-		struct pmu_perfmon_cmd_start_v2 start_v2;
-		struct pmu_perfmon_cmd_start_v3 start_v3;
-		struct pmu_perfmon_cmd_stop stop;
-		struct pmu_perfmon_cmd_init_v0 init_v0;
-		struct pmu_perfmon_cmd_init_v1 init_v1;
-		struct pmu_perfmon_cmd_init_v2 init_v2;
-		struct pmu_perfmon_cmd_init_v3 init_v3;
-	};
-};
-
-struct pmu_zbc_cmd {
-	u8 cmd_type;
-	u8 pad;
-	u16 entry_mask;
-};
-
-/* PERFMON MSG */
-enum {
-	PMU_PERFMON_MSG_ID_INCREASE_EVENT = 0,
-	PMU_PERFMON_MSG_ID_DECREASE_EVENT = 1,
-	PMU_PERFMON_MSG_ID_INIT_EVENT     = 2,
-	PMU_PERFMON_MSG_ID_ACK            = 3
-};
-
-struct pmu_perfmon_msg_generic {
-	u8 msg_type;
-	u8 state_id;
-	u8 group_id;
-	u8 data;
-};
-
-struct pmu_perfmon_msg {
-	union {
-		u8 msg_type;
-		struct pmu_perfmon_msg_generic gen;
-	};
-};
-
-/*---------------------------------------------------------*/
 /* ACR Commands/Message structures */
 
 enum {
-- 
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