From fea32c74dcfa708608f286fe5020f1f40a3390c0 Mon Sep 17 00:00:00 2001 From: David Nieto Date: Fri, 20 Oct 2017 09:32:55 -0700 Subject: gpu: nvgpu: add cache maintenance timeout override Add functions to get per-chip cache maintenance timeout overrides. JIRA: NVGPUGV100-GV100 Change-Id: Ie14efc616e7af52ede60031c789bd2ae70857a6e Signed-off-by: David Nieto Reviewed-on: https://git-master.nvidia.com/r/1582768 Reviewed-by: mobile promotions Tested-by: mobile promotions --- drivers/gpu/nvgpu/gk20a/mm_gk20a.h | 8 ++++++++ 1 file changed, 8 insertions(+) (limited to 'drivers/gpu/nvgpu/gk20a/mm_gk20a.h') diff --git a/drivers/gpu/nvgpu/gk20a/mm_gk20a.h b/drivers/gpu/nvgpu/gk20a/mm_gk20a.h index 13698cd7..15876b10 100644 --- a/drivers/gpu/nvgpu/gk20a/mm_gk20a.h +++ b/drivers/gpu/nvgpu/gk20a/mm_gk20a.h @@ -315,6 +315,14 @@ static inline u64 __nv_gmmu_va_small_page_limit(void) return ((u64)SZ_1G * 56); } +enum nvgpu_flush_op { + NVGPU_FLUSH_DEFAULT, + NVGPU_FLUSH_FB, + NVGPU_FLUSH_L2_INV, + NVGPU_FLUSH_L2_FLUSH, + NVGPU_FLUSH_CBC_CLEAN, +}; + enum gmmu_pgsz_gk20a __get_pte_size_fixed_map(struct vm_gk20a *vm, u64 base, u64 size); enum gmmu_pgsz_gk20a __get_pte_size(struct vm_gk20a *vm, u64 base, u64 size); -- cgit v1.2.2