From edb116661348f1bc843849cdcc318fa47cf9724a Mon Sep 17 00:00:00 2001 From: Alex Waterman Date: Wed, 16 Aug 2017 16:19:53 -0700 Subject: gpu: nvgpu: rename ops.mm.get_physical_addr_bits Rename get_physical_addr_bits and related functions to something that more clearly conveys what they are doing. The basic idea of these functions is to translate from a physical GPU address to a IOMMU GPU address. To do that a particular bit (that varies from chip to chip) is added to the physical address. JIRA NVGPU-68 Change-Id: I536cc595c4397aad69a24f740bc74db03f52bc0a Signed-off-by: Alex Waterman Reviewed-on: https://git-master.nvidia.com/r/1542966 Reviewed-by: mobile promotions Tested-by: mobile promotions --- drivers/gpu/nvgpu/gk20a/mm_gk20a.h | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) (limited to 'drivers/gpu/nvgpu/gk20a/mm_gk20a.h') diff --git a/drivers/gpu/nvgpu/gk20a/mm_gk20a.h b/drivers/gpu/nvgpu/gk20a/mm_gk20a.h index 13a3dcd0..9f03a495 100644 --- a/drivers/gpu/nvgpu/gk20a/mm_gk20a.h +++ b/drivers/gpu/nvgpu/gk20a/mm_gk20a.h @@ -342,8 +342,6 @@ void gk20a_mm_dump_vm(struct vm_gk20a *vm, int gk20a_mm_suspend(struct gk20a *g); -u64 gk20a_mm_smmu_vaddr_translate(struct gk20a *g, dma_addr_t iova); - void gk20a_mm_ltc_isr(struct gk20a *g); bool gk20a_mm_mmu_debug_mode_enabled(struct gk20a *g); @@ -420,7 +418,7 @@ void pde_range_from_vaddr_range(struct vm_gk20a *vm, u64 addr_lo, u64 addr_hi, u32 *pde_lo, u32 *pde_hi); int gk20a_mm_pde_coverage_bit_count(struct vm_gk20a *vm); -u32 gk20a_mm_get_physical_addr_bits(struct gk20a *g); +u32 gk20a_mm_get_iommu_bit(struct gk20a *g); const struct gk20a_mmu_level *gk20a_mm_get_mmu_levels(struct gk20a *g, u32 big_page_size); -- cgit v1.2.2