From 16ef96d4de646a97cee250b1e178f15d5e0909c3 Mon Sep 17 00:00:00 2001 From: Konsta Holtta Date: Mon, 27 Aug 2018 14:17:05 +0300 Subject: gpu: nvgpu: move priv cmd definitions to channel struct priv_cmd_queue and struct priv_cmd_entry are related to the list of jobs in a channel, so move their definitions from the mm header to the channel header. Jira NVGPU-967 Change-Id: Ib0cf3fd52be463e720165a47e56b14724273473e Signed-off-by: Konsta Holtta Reviewed-on: https://git-master.nvidia.com/r/1807371 Reviewed-by: mobile promotions Tested-by: mobile promotions --- drivers/gpu/nvgpu/gk20a/mm_gk20a.h | 16 ---------------- 1 file changed, 16 deletions(-) (limited to 'drivers/gpu/nvgpu/gk20a/mm_gk20a.h') diff --git a/drivers/gpu/nvgpu/gk20a/mm_gk20a.h b/drivers/gpu/nvgpu/gk20a/mm_gk20a.h index 708dada3..76a16216 100644 --- a/drivers/gpu/nvgpu/gk20a/mm_gk20a.h +++ b/drivers/gpu/nvgpu/gk20a/mm_gk20a.h @@ -85,22 +85,6 @@ gk20a_buffer_state_from_list(struct nvgpu_list_node *node) ((uintptr_t)node - offsetof(struct gk20a_buffer_state, list)); }; -struct priv_cmd_queue { - struct nvgpu_mem mem; - u32 size; /* num of entries in words */ - u32 put; /* put for priv cmd queue */ - u32 get; /* get for priv cmd queue */ -}; - -struct priv_cmd_entry { - bool valid; - struct nvgpu_mem *mem; - u32 off; /* offset in mem, in u32 entries */ - u64 gva; - u32 get; /* start of entry in queue */ - u32 size; /* in words */ -}; - struct gk20a; struct channel_gk20a; -- cgit v1.2.2