From d37aa77ab5f0edd3225af31fef389bc066f20fda Mon Sep 17 00:00:00 2001 From: Mahantesh Kumbar Date: Tue, 9 Dec 2014 11:45:51 +0530 Subject: gpu: nvgpu: Allow enabling/disabling MC interrupt Added method to enable/disable MC interrupt by unit Bug 200064127 Change-Id: I89e794d5b69a2a93642e2df437d6744bf595f021 Signed-off-by: Mahantesh Kumbar Reviewed-on: http://git-master/r/661211 Reviewed-by: Terje Bergstrom Tested-by: Terje Bergstrom --- drivers/gpu/nvgpu/gk20a/mc_gk20a.c | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+) (limited to 'drivers/gpu/nvgpu/gk20a/mc_gk20a.c') diff --git a/drivers/gpu/nvgpu/gk20a/mc_gk20a.c b/drivers/gpu/nvgpu/gk20a/mc_gk20a.c index 4d176403..899eeff7 100644 --- a/drivers/gpu/nvgpu/gk20a/mc_gk20a.c +++ b/drivers/gpu/nvgpu/gk20a/mc_gk20a.c @@ -137,9 +137,27 @@ void mc_gk20a_intr_enable(struct gk20a *g) mc_intr_en_0_inta_hardware_f()); } +void mc_gk20a_intr_unit_config(struct gk20a *g, bool enable, + bool is_stalling, u32 mask) +{ + u32 mask_reg = (is_stalling ? mc_intr_mask_0_r() : + mc_intr_mask_1_r()); + + if (enable) { + gk20a_writel(g, mask_reg, + gk20a_readl(g, mask_reg) | + mask); + } else { + gk20a_writel(g, mask_reg, + gk20a_readl(g, mask_reg) & + ~mask); + } +} + void gk20a_init_mc(struct gpu_ops *gops) { gops->mc.intr_enable = mc_gk20a_intr_enable; + gops->mc.intr_unit_config = mc_gk20a_intr_unit_config; gops->mc.isr_stall = mc_gk20a_isr_stall; gops->mc.isr_nonstall = mc_gk20a_isr_nonstall; gops->mc.isr_thread_stall = mc_gk20a_intr_thread_stall; -- cgit v1.2.2