From 6299b00beb9dabdd53c211b02658d022827b3232 Mon Sep 17 00:00:00 2001 From: Lakshmanan M Date: Thu, 2 Jun 2016 09:34:46 +0530 Subject: gpu: nvgpu: Add multiple engine and runlist support This CL covers the following modification, 1) Added multiple engine_info support 2) Added multiple runlist_info support 3) Initial changes for ASYNC CE support 4) Added ASYNC CE interrupt handling support for gm206 GPU family 5) Added generic mechanism to identify the CE engine pri_base address for gm206 (CE0, CE1 and CE2) 6) Removed hard coded engine_id logic and made generic way 7) Code cleanup for readability JIRA DNVGPU-26 Change-Id: I2c3846c40bcc8d10c2dfb225caa4105fc9123b65 Signed-off-by: Lakshmanan M Reviewed-on: http://git-master/r/1155963 Reviewed-by: Terje Bergstrom Tested-by: Terje Bergstrom --- drivers/gpu/nvgpu/gk20a/gr_gk20a.h | 8 ++++++++ 1 file changed, 8 insertions(+) (limited to 'drivers/gpu/nvgpu/gk20a/gr_gk20a.h') diff --git a/drivers/gpu/nvgpu/gk20a/gr_gk20a.h b/drivers/gpu/nvgpu/gk20a/gr_gk20a.h index b5d97727..189994ef 100644 --- a/drivers/gpu/nvgpu/gk20a/gr_gk20a.h +++ b/drivers/gpu/nvgpu/gk20a/gr_gk20a.h @@ -81,6 +81,12 @@ enum { eUcodeHandshakeMethodFinished }; +enum { + ELCG_MODE = (1 << 0), + BLCG_MODE = (1 << 1), + INVALID_MODE = (1 << 2) +}; + enum { ELCG_RUN, /* clk always run, i.e. disable elcg */ ELCG_STOP, /* clk is stopped */ @@ -476,6 +482,8 @@ int gr_gk20a_fecs_set_reglist_virtual_addr(struct gk20a *g, u64 pmu_va); void gr_gk20a_init_elcg_mode(struct gk20a *g, u32 mode, u32 engine); void gr_gk20a_init_blcg_mode(struct gk20a *g, u32 mode, u32 engine); +void gr_gk20a_init_cg_mode(struct gk20a *g, u32 cgmode, u32 mode_config); + /* sm */ bool gk20a_gr_sm_debugger_attached(struct gk20a *g); void gk20a_gr_clear_sm_hww(struct gk20a *g, -- cgit v1.2.2