From 33f192b2f781007fb7f9598613ce3811f3f39237 Mon Sep 17 00:00:00 2001 From: Sandeep Shinde Date: Thu, 24 Aug 2017 12:12:42 +0530 Subject: gpu: nvgpu: Add pd_max_batches sysfs node for gp10b Add a new sysfs node pd_max_batches for setting max batches value in NV_PGRAPH_PRI_PD_AB_DIST_CONFIG_1_MAX_BATCHES register which controls max number of batches per alpha-beta transition stored in PD. Bug 1927124 Change-Id: I2817f2d70dab348d8b0b8ba19bf1e9b9d23ca907 Signed-off-by: Sandeep Shinde Reviewed-on: https://git-master.nvidia.com/r/1544104 Reviewed-by: Bharat Nihalani (cherry picked from commit aa4daddda23aa44a84464200f497eac802a8e6ce) Reviewed-on: https://git-master.nvidia.com/r/1543355 Reviewed-by: svc-mobile-coverity Reviewed-by: svccoveritychecker Reviewed-by: Terje Bergstrom GVS: Gerrit_Virtual_Submit --- drivers/gpu/nvgpu/gk20a/gr_gk20a.h | 1 + 1 file changed, 1 insertion(+) (limited to 'drivers/gpu/nvgpu/gk20a/gr_gk20a.h') diff --git a/drivers/gpu/nvgpu/gk20a/gr_gk20a.h b/drivers/gpu/nvgpu/gk20a/gr_gk20a.h index 400b7feb..42296084 100644 --- a/drivers/gpu/nvgpu/gk20a/gr_gk20a.h +++ b/drivers/gpu/nvgpu/gk20a/gr_gk20a.h @@ -322,6 +322,7 @@ struct gr_gk20a { u32 alpha_cb_size; u32 timeslice_mode; u32 czf_bypass; + u32 pd_max_batches; struct gr_ctx_buffer_desc global_ctx_buffer[NR_GLOBAL_CTX_BUF]; -- cgit v1.2.2