From ed65f1f26e2d0ca4a491215297b61d25b0c1493b Mon Sep 17 00:00:00 2001 From: Terje Bergstrom Date: Thu, 24 May 2018 12:31:57 -0700 Subject: gpu: nvgpu: Move setting priv interrupt to priv_ring Registers to set priv interrupts are in priv_ring, but the code was in bus HAL. Move the code and related HALs to priv_ring instead. JIRA NVGPU-588 Change-Id: I708d11f77405dbba86586a0d1da42f65bcc1de9d Signed-off-by: Terje Bergstrom Reviewed-on: https://git-master.nvidia.com/r/1730889 Reviewed-by: mobile promotions Tested-by: mobile promotions --- drivers/gpu/nvgpu/gk20a/gr_gk20a.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'drivers/gpu/nvgpu/gk20a/gr_gk20a.c') diff --git a/drivers/gpu/nvgpu/gk20a/gr_gk20a.c b/drivers/gpu/nvgpu/gk20a/gr_gk20a.c index 52346541..42e96715 100644 --- a/drivers/gpu/nvgpu/gk20a/gr_gk20a.c +++ b/drivers/gpu/nvgpu/gk20a/gr_gk20a.c @@ -4502,8 +4502,8 @@ static int gk20a_init_gr_setup_hw(struct gk20a *g) gr_gk20a_zcull_init_hw(g, gr); - if (g->ops.bus.set_ppriv_timeout_settings) - g->ops.bus.set_ppriv_timeout_settings(g); + if (g->ops.priv_ring.set_ppriv_timeout_settings) + g->ops.priv_ring.set_ppriv_timeout_settings(g); /* enable fifo access */ gk20a_writel(g, gr_gpfifo_ctl_r(), -- cgit v1.2.2