From 4607098c3a889b815dc85035649856f225fffb0b Mon Sep 17 00:00:00 2001 From: Deepak Nibade Date: Mon, 28 May 2018 17:21:12 -0700 Subject: gpu: nvgpu: support CAU ctxsw list CAU (Counter Aggregation Unit) registers might be split out from SMPC registers and moved into their own list on some platforms In gr_gk20a_init_ctx_vars_fw() add support to check if pm_cau list is available If list is available, count will be set to non-zero here In add_ctxsw_buffer_map_entries_gpcs(), parse the pm_cau list if count is non-zero Bug 2139870 Change-Id: Ia630e7d03481a6f927c6739d28ebfe49f221326f Signed-off-by: Deepak Nibade Reviewed-on: https://git-master.nvidia.com/r/1733208 Reviewed-by: svc-mobile-coverity GVS: Gerrit_Virtual_Submit Reviewed-by: Matthew Braun (SW-GPU) Reviewed-by: Terje Bergstrom Reviewed-by: mobile promotions Tested-by: mobile promotions --- drivers/gpu/nvgpu/gk20a/gr_ctx_gk20a.h | 1 + 1 file changed, 1 insertion(+) (limited to 'drivers/gpu/nvgpu/gk20a/gr_ctx_gk20a.h') diff --git a/drivers/gpu/nvgpu/gk20a/gr_ctx_gk20a.h b/drivers/gpu/nvgpu/gk20a/gr_ctx_gk20a.h index d8fb8dcd..afc3e9df 100644 --- a/drivers/gpu/nvgpu/gk20a/gr_ctx_gk20a.h +++ b/drivers/gpu/nvgpu/gk20a/gr_ctx_gk20a.h @@ -105,6 +105,7 @@ union __max_name { #define NETLIST_REGIONID_CTXREG_PMROP 31 #define NETLIST_REGIONID_CTXREG_PMUCGPC 32 #define NETLIST_REGIONID_CTXREG_ETPC 33 +#define NETLIST_REGIONID_NVPERF_PMCAU 35 struct netlist_region { u32 region_id; -- cgit v1.2.2