From 8be2f2bf4c46709f2a900b5ae5d8a61d2548ae3f Mon Sep 17 00:00:00 2001 From: Terje Bergstrom Date: Mon, 18 Aug 2014 12:52:20 +0300 Subject: gpu: nvgpu: gm20b: Regenerate clock gating lists Regenerate clock gating lists. Add new blocks, and takes them into use. Also moves some clock gating settings to be applied at the earliest possible moment right after reset. Change-Id: I21888186c200f7a477c63bd3332e8ed578f63741 Signed-off-by: Terje Bergstrom Reviewed-on: http://git-master/r/457698 --- drivers/gpu/nvgpu/gk20a/gk20a_sysfs.c | 32 ++++++++++++++++++++++++++++++++ 1 file changed, 32 insertions(+) (limited to 'drivers/gpu/nvgpu/gk20a/gk20a_sysfs.c') diff --git a/drivers/gpu/nvgpu/gk20a/gk20a_sysfs.c b/drivers/gpu/nvgpu/gk20a/gk20a_sysfs.c index fceed5e9..687147ed 100644 --- a/drivers/gpu/nvgpu/gk20a/gk20a_sysfs.c +++ b/drivers/gpu/nvgpu/gk20a/gk20a_sysfs.c @@ -94,7 +94,19 @@ static ssize_t blcg_enable_store(struct device *device, g->blcg_enabled = false; gk20a_busy(g->dev); + if (g->ops.clock_gating.blcg_bus_load_gating_prod) + g->ops.clock_gating.blcg_bus_load_gating_prod(g, g->blcg_enabled); + if (g->ops.clock_gating.blcg_ctxsw_firmware_load_gating_prod) + g->ops.clock_gating.blcg_ctxsw_firmware_load_gating_prod(g, g->blcg_enabled); + if (g->ops.clock_gating.blcg_fb_load_gating_prod) + g->ops.clock_gating.blcg_fb_load_gating_prod(g, g->blcg_enabled); + if (g->ops.clock_gating.blcg_fifo_load_gating_prod) + g->ops.clock_gating.blcg_fifo_load_gating_prod(g, g->blcg_enabled); g->ops.clock_gating.blcg_gr_load_gating_prod(g, g->blcg_enabled); + if (g->ops.clock_gating.blcg_ltc_load_gating_prod) + g->ops.clock_gating.blcg_ltc_load_gating_prod(g, g->blcg_enabled); + if (g->ops.clock_gating.blcg_pmu_load_gating_prod) + g->ops.clock_gating.blcg_pmu_load_gating_prod(g, g->blcg_enabled); gk20a_idle(g->dev); dev_info(device, "BLCG is %s.\n", g->blcg_enabled ? "enabled" : @@ -136,8 +148,28 @@ static ssize_t slcg_enable_store(struct device *device, * it is added to init, we should add it here too. */ gk20a_busy(g->dev); + if (g->ops.clock_gating.slcg_bus_load_gating_prod) + g->ops.clock_gating.slcg_bus_load_gating_prod(g, g->slcg_enabled); + if (g->ops.clock_gating.slcg_ce2_load_gating_prod) + g->ops.clock_gating.slcg_ce2_load_gating_prod(g, g->slcg_enabled); + if (g->ops.clock_gating.slcg_chiplet_load_gating_prod) + g->ops.clock_gating.slcg_chiplet_load_gating_prod(g, g->slcg_enabled); + if (g->ops.clock_gating.slcg_ctxsw_firmware_load_gating_prod) + g->ops.clock_gating.slcg_ctxsw_firmware_load_gating_prod(g, g->slcg_enabled); + if (g->ops.clock_gating.slcg_fb_load_gating_prod) + g->ops.clock_gating.slcg_fb_load_gating_prod(g, g->slcg_enabled); + if (g->ops.clock_gating.slcg_fifo_load_gating_prod) + g->ops.clock_gating.slcg_fifo_load_gating_prod(g, g->slcg_enabled); g->ops.clock_gating.slcg_gr_load_gating_prod(g, g->slcg_enabled); + if (g->ops.clock_gating.slcg_ltc_load_gating_prod) + g->ops.clock_gating.slcg_ltc_load_gating_prod(g, g->slcg_enabled); g->ops.clock_gating.slcg_perf_load_gating_prod(g, g->slcg_enabled); + if (g->ops.clock_gating.slcg_priring_load_gating_prod) + g->ops.clock_gating.slcg_priring_load_gating_prod(g, g->slcg_enabled); + if (g->ops.clock_gating.slcg_pmu_load_gating_prod) + g->ops.clock_gating.slcg_pmu_load_gating_prod(g, g->slcg_enabled); + if (g->ops.clock_gating.slcg_xbar_load_gating_prod) + g->ops.clock_gating.slcg_xbar_load_gating_prod(g, g->slcg_enabled); gk20a_idle(g->dev); dev_info(device, "SLCG is %s.\n", g->slcg_enabled ? "enabled" : -- cgit v1.2.2