From 0e8aee1c1a38abbc2dccf3f604a9843cf38071e0 Mon Sep 17 00:00:00 2001 From: Deepak Goyal Date: Fri, 22 Sep 2017 12:08:10 +0530 Subject: gpu: nvgpu: skip clk gating prog for sim/emu. For Simualtion/Emulation platforms,clock gating should be skipped as it is not supported. Added new flags "can_"X"lcg" to check platform capability before doing SLCG,BLCG and ELCG. Bug 200314250 Change-Id: I4124d444a77a4c06df8c1d82c6038bfd457f3db0 Signed-off-by: Deepak Goyal Reviewed-on: https://git-master.nvidia.com/r/1566049 Reviewed-by: mobile promotions Tested-by: mobile promotions --- drivers/gpu/nvgpu/gk20a/gk20a_gating_reglist.c | 23 ++++++++++++++++++++++- 1 file changed, 22 insertions(+), 1 deletion(-) (limited to 'drivers/gpu/nvgpu/gk20a/gk20a_gating_reglist.c') diff --git a/drivers/gpu/nvgpu/gk20a/gk20a_gating_reglist.c b/drivers/gpu/nvgpu/gk20a/gk20a_gating_reglist.c index 45b25425..751c6a19 100644 --- a/drivers/gpu/nvgpu/gk20a/gk20a_gating_reglist.c +++ b/drivers/gpu/nvgpu/gk20a/gk20a_gating_reglist.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2012-2015, NVIDIA Corporation. All rights reserved. + * Copyright (c) 2012-2017, NVIDIA Corporation. All rights reserved. * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), @@ -26,6 +26,7 @@ #define __gk20a_gating_reglist_h__ #include "gk20a_gating_reglist.h" +#include struct gating_desc { u32 addr; @@ -305,6 +306,10 @@ void gr_gk20a_slcg_gr_load_gating_prod(struct gk20a *g, { u32 i; u32 size = sizeof(gk20a_slcg_gr) / sizeof(struct gating_desc); + + if (!nvgpu_is_enabled(g, NVGPU_GPU_CAN_SLCG)) + return; + for (i = 0; i < size; i++) { if (prod) gk20a_writel(g, gk20a_slcg_gr[i].addr, @@ -325,6 +330,10 @@ void gr_gk20a_slcg_perf_load_gating_prod(struct gk20a *g, { u32 i; u32 size = sizeof(gk20a_slcg_perf) / sizeof(struct gating_desc); + + if (!nvgpu_is_enabled(g, NVGPU_GPU_CAN_SLCG)) + return; + for (i = 0; i < size; i++) { if (prod) gk20a_writel(g, gk20a_slcg_perf[i].addr, @@ -340,6 +349,10 @@ void gr_gk20a_blcg_gr_load_gating_prod(struct gk20a *g, { u32 i; u32 size = sizeof(gk20a_blcg_gr) / sizeof(struct gating_desc); + + if (!nvgpu_is_enabled(g, NVGPU_GPU_CAN_BLCG)) + return; + for (i = 0; i < size; i++) { if (prod) gk20a_writel(g, gk20a_blcg_gr[i].addr, @@ -355,6 +368,10 @@ void gr_gk20a_pg_gr_load_gating_prod(struct gk20a *g, { u32 i; u32 size = sizeof(gk20a_pg_gr) / sizeof(struct gating_desc); + + if (!nvgpu_is_enabled(g, NVGPU_GPU_CAN_BLCG)) + return; + for (i = 0; i < size; i++) { if (prod) gk20a_writel(g, gk20a_pg_gr[i].addr, @@ -370,6 +387,10 @@ void gr_gk20a_slcg_therm_load_gating_prod(struct gk20a *g, { u32 i; u32 size = sizeof(gk20a_slcg_therm) / sizeof(struct gating_desc); + + if (!nvgpu_is_enabled(g, NVGPU_GPU_CAN_SLCG)) + return; + for (i = 0; i < size; i++) { if (prod) gk20a_writel(g, gk20a_slcg_therm[i].addr, -- cgit v1.2.2