From f36e2a234b39cf7622c57ad51359629f5c425340 Mon Sep 17 00:00:00 2001 From: Seema Khowala Date: Tue, 6 Jun 2017 15:47:17 -0700 Subject: gpu: nvgpu: support context regoptype for egpc/etpc - add is_egpc_addr, is_etpc_addr and get_egpc_etpc_num gr ops - add gr ops for decode and create egpc/etpc priv addr - add etpc as part of ctxsw_regs JIRA GPUT19X-49 Bug 200311674 Bug 1960226 Signed-off-by: Seema Khowala Change-Id: I9a8be1804a9354238de2441093b3b136321b7e53 Reviewed-on: https://git-master.nvidia.com/r/1522442 Reviewed-by: mobile promotions Tested-by: mobile promotions --- drivers/gpu/nvgpu/gk20a/gk20a.h | 11 +++++++++++ 1 file changed, 11 insertions(+) (limited to 'drivers/gpu/nvgpu/gk20a/gk20a.h') diff --git a/drivers/gpu/nvgpu/gk20a/gk20a.h b/drivers/gpu/nvgpu/gk20a/gk20a.h index 6fe29abe..ff8eb988 100644 --- a/drivers/gpu/nvgpu/gk20a/gk20a.h +++ b/drivers/gpu/nvgpu/gk20a/gk20a.h @@ -216,8 +216,19 @@ struct gpu_ops { u32 mode); int (*get_zcull_info)(struct gk20a *g, struct gr_gk20a *gr, struct gr_zcull_info *zcull_params); + int (*decode_egpc_addr)(struct gk20a *g, + u32 addr, int *addr_type, + u32 *gpc_num, u32 *tpc_num, u32 *broadcast_flags); + void (*egpc_etpc_priv_addr_table)(struct gk20a *g, u32 addr, + u32 gpc, u32 broadcast_flags, u32 *priv_addr_table, + u32 *priv_addr_table_index); bool (*is_tpc_addr)(struct gk20a *g, u32 addr); + bool (*is_egpc_addr)(struct gk20a *g, u32 addr); + bool (*is_etpc_addr)(struct gk20a *g, u32 addr); + void (*get_egpc_etpc_num)(struct gk20a *g, u32 addr, + u32 *gpc_num, u32 *tpc_num); u32 (*get_tpc_num)(struct gk20a *g, u32 addr); + u32 (*get_egpc_base)(struct gk20a *g); bool (*is_ltcs_ltss_addr)(struct gk20a *g, u32 addr); bool (*is_ltcn_ltss_addr)(struct gk20a *g, u32 addr); bool (*get_lts_in_ltc_shared_base)(void); -- cgit v1.2.2