From ed65f1f26e2d0ca4a491215297b61d25b0c1493b Mon Sep 17 00:00:00 2001 From: Terje Bergstrom Date: Thu, 24 May 2018 12:31:57 -0700 Subject: gpu: nvgpu: Move setting priv interrupt to priv_ring Registers to set priv interrupts are in priv_ring, but the code was in bus HAL. Move the code and related HALs to priv_ring instead. JIRA NVGPU-588 Change-Id: I708d11f77405dbba86586a0d1da42f65bcc1de9d Signed-off-by: Terje Bergstrom Reviewed-on: https://git-master.nvidia.com/r/1730889 Reviewed-by: mobile promotions Tested-by: mobile promotions --- drivers/gpu/nvgpu/gk20a/gk20a.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'drivers/gpu/nvgpu/gk20a/gk20a.h') diff --git a/drivers/gpu/nvgpu/gk20a/gk20a.h b/drivers/gpu/nvgpu/gk20a/gk20a.h index 77e6e759..2d304cff 100644 --- a/drivers/gpu/nvgpu/gk20a/gk20a.h +++ b/drivers/gpu/nvgpu/gk20a/gk20a.h @@ -1128,7 +1128,6 @@ struct gpu_ops { u32 source_id, u32 count, struct nvgpu_cpu_time_correlation_sample *); int (*bar1_bind)(struct gk20a *g, struct nvgpu_mem *bar1_inst); - void (*set_ppriv_timeout_settings)(struct gk20a *g); } bus; struct { @@ -1179,6 +1178,7 @@ struct gpu_ops { struct { void (*isr)(struct gk20a *g); void (*decode_error_code)(struct gk20a *g, u32 error_code); + void (*set_ppriv_timeout_settings)(struct gk20a *g); } priv_ring; struct { int (*check_priv_security)(struct gk20a *g); -- cgit v1.2.2