From a8cf64019f74dd05626a911af3df079efd9c7c89 Mon Sep 17 00:00:00 2001 From: Terje Bergstrom Date: Mon, 1 May 2017 15:31:00 -0700 Subject: gpu: nvgpu: Introduce priv ring HAL and define ISR Introduce a priv ring HAL and define ISR as the only function in it. Introduce a gp10b version of the ISR that writes error message to UART for every priv ring error, and leave the old chips with silent error handling. Bug 1846641 Change-Id: I73e38396205ac7bb7b8488b7fbca3ff67a3db3bb Signed-off-by: Terje Bergstrom Reviewed-on: http://git-master/r/1473696 Reviewed-by: mobile promotions Tested-by: mobile promotions --- drivers/gpu/nvgpu/gk20a/gk20a.h | 3 +++ 1 file changed, 3 insertions(+) (limited to 'drivers/gpu/nvgpu/gk20a/gk20a.h') diff --git a/drivers/gpu/nvgpu/gk20a/gk20a.h b/drivers/gpu/nvgpu/gk20a/gk20a.h index 03f61c33..626ed2bd 100644 --- a/drivers/gpu/nvgpu/gk20a/gk20a.h +++ b/drivers/gpu/nvgpu/gk20a/gk20a.h @@ -886,6 +886,9 @@ struct gpu_ops { struct { void (*falcon_hal_sw_init)(struct nvgpu_falcon *flcn); } falcon; + struct { + void (*isr)(struct gk20a *g); + } priv_ring; }; struct nvgpu_bios_ucode { -- cgit v1.2.2