From a0dfb2b91112a766fb4b3e2aaafa99167151c3da Mon Sep 17 00:00:00 2001 From: Deepak Nibade Date: Fri, 13 Apr 2018 13:18:28 +0530 Subject: gpu: nvgpu: gv100: consider floorswept FBPA for getting unicast list In gr_gv11b/gk20a_create_priv_addr_table() we do not consider floorswept FBPAs and just calculate the unicast list assuming all FBPAs are present This generates incorrect list of unicast addresses Fix this introducing new HAL ops.gr.split_fbpa_broadcast_addr Set gr_gv100_get_active_fpba_mask() for GV100 Set gr_gk20a_split_fbpa_broadcast_addr() for rest of the chips gr_gv100_get_active_fpba_mask() will first get active FPBA mask and generate unicast list only for active FBPAs Bug 200398811 Jira NVGPU-556 Change-Id: Idd11d6e7ad7b6836525fe41509aeccf52038321f Signed-off-by: Deepak Nibade Reviewed-on: https://git-master.nvidia.com/r/1694444 GVS: Gerrit_Virtual_Submit Reviewed-by: Bharat Nihalani Reviewed-by: mobile promotions Tested-by: mobile promotions --- drivers/gpu/nvgpu/gk20a/gk20a.h | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'drivers/gpu/nvgpu/gk20a/gk20a.h') diff --git a/drivers/gpu/nvgpu/gk20a/gk20a.h b/drivers/gpu/nvgpu/gk20a/gk20a.h index 2d1eb388..c55ba146 100644 --- a/drivers/gpu/nvgpu/gk20a/gk20a.h +++ b/drivers/gpu/nvgpu/gk20a/gk20a.h @@ -472,6 +472,10 @@ struct gpu_ops { u32 *priv_addr_table, u32 *num_registers); u32 (*get_pmm_per_chiplet_offset)(void); + void (*split_fbpa_broadcast_addr)(struct gk20a *g, u32 addr, + u32 num_fbpas, + u32 *priv_addr_table, + u32 *priv_addr_table_index); } gr; struct { void (*init_hw)(struct gk20a *g); -- cgit v1.2.2