From 994a60385166725cc007731c0ff353d4d643eeed Mon Sep 17 00:00:00 2001 From: Seema Khowala Date: Tue, 6 Jun 2017 22:50:12 -0700 Subject: gpu: nvgpu: add perf gr ops to support t19x Add init_ovr_sm_dsm_perf & get_ovr_perf_regs gr ops JIRA GPUT19X-49 Bug 200311674 Change-Id: If02dd9dc0e2e0eb1f68fdbaa86a37c6768eddcef Signed-off-by: Seema Khowala Reviewed-on: https://git-master.nvidia.com/r/1497403 Reviewed-by: mobile promotions Tested-by: mobile promotions --- drivers/gpu/nvgpu/gk20a/gk20a.h | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'drivers/gpu/nvgpu/gk20a/gk20a.h') diff --git a/drivers/gpu/nvgpu/gk20a/gk20a.h b/drivers/gpu/nvgpu/gk20a/gk20a.h index ac195fea..6fe29abe 100644 --- a/drivers/gpu/nvgpu/gk20a/gk20a.h +++ b/drivers/gpu/nvgpu/gk20a/gk20a.h @@ -195,6 +195,9 @@ struct gpu_ops { u32 *num_sm_dsm_perf_regs, u32 **sm_dsm_perf_regs, u32 *perf_register_stride); + void (*get_ovr_perf_regs)(struct gk20a *g, + u32 *num_ovr_perf_regs, + u32 **ovr_perf_regsr); void (*set_hww_esr_report_mask)(struct gk20a *g); int (*setup_alpha_beta_tables)(struct gk20a *g, struct gr_gk20a *gr); @@ -273,6 +276,7 @@ struct gpu_ops { u32 (*get_max_lts_per_ltc)(struct gk20a *g); u32* (*get_rop_l2_en_mask)(struct gk20a *g); void (*init_sm_dsm_reg_info)(void); + void (*init_ovr_sm_dsm_perf)(void); int (*wait_empty)(struct gk20a *g, unsigned long duration_ms, u32 expect_delay); void (*init_cyclestats)(struct gk20a *g); -- cgit v1.2.2