From 98e349ab7eb01ac27e1e18477674294ca80d2093 Mon Sep 17 00:00:00 2001 From: Mahantesh Kumbar Date: Wed, 9 Nov 2016 19:38:33 +0530 Subject: gpu: nvgpu: PG statistics update - PG statistics read support for multiple engines - updated stat_dmem_offset member to array to hold dmem offset of PG engines - PMU allocates memory in DMEM for each PG engine requested, updated gk20a_pmu_get_elpg_residency_gating() to get engine statistics for requested PG engine JIRA DNVGPU-71 Change-Id: I2ddade37f85716f757bf33034dbff816184577eb Signed-off-by: Mahantesh Kumbar Reviewed-on: http://git-master/r/1250506 (cherry picked from commit 68ba7a97d6662b87d0e489365d8afb8e2d237a03) Reviewed-on: http://git-master/r/1270972 Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom --- drivers/gpu/nvgpu/gk20a/gk20a.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'drivers/gpu/nvgpu/gk20a/gk20a.h') diff --git a/drivers/gpu/nvgpu/gk20a/gk20a.h b/drivers/gpu/nvgpu/gk20a/gk20a.h index 782469df..d444447d 100644 --- a/drivers/gpu/nvgpu/gk20a/gk20a.h +++ b/drivers/gpu/nvgpu/gk20a/gk20a.h @@ -603,7 +603,7 @@ struct gpu_ops { int (*init_wpr_region)(struct gk20a *g); int (*load_lsfalcon_ucode)(struct gk20a *g, u32 falconidmask); void (*write_dmatrfbase)(struct gk20a *g, u32 addr); - void (*pmu_elpg_statistics)(struct gk20a *g, + void (*pmu_elpg_statistics)(struct gk20a *g, u32 pg_engine_id, u32 *ingating_time, u32 *ungating_time, u32 *gating_cnt); int (*pmu_pg_init_param)(struct gk20a *g, u32 pg_engine_id); -- cgit v1.2.2