From 8371833f4273c2d4a6f923eb3270b4ab93967743 Mon Sep 17 00:00:00 2001 From: Terje Bergstrom Date: Mon, 27 Oct 2014 11:03:00 +0200 Subject: gpu: nvgpu: Per-chip interrupt processing Move accesses to MC registers under HAL so that they can be reimplemented per chip. Do chip detection and HAL initialization only once. Bug 1567274 Change-Id: I20bf2f439d267d284bfd536f1a1dfb5d5a2dce4c Signed-off-by: Terje Bergstrom Reviewed-on: http://git-master/r/590385 --- drivers/gpu/nvgpu/gk20a/gk20a.h | 12 +++++++++++- 1 file changed, 11 insertions(+), 1 deletion(-) (limited to 'drivers/gpu/nvgpu/gk20a/gk20a.h') diff --git a/drivers/gpu/nvgpu/gk20a/gk20a.h b/drivers/gpu/nvgpu/gk20a/gk20a.h index 5669e1c5..a111a040 100644 --- a/drivers/gpu/nvgpu/gk20a/gk20a.h +++ b/drivers/gpu/nvgpu/gk20a/gk20a.h @@ -29,7 +29,8 @@ struct acr_gm20b; #include #include -#include +#include +#include #include #include "../../../arch/arm/mach-tegra/iomap.h" @@ -335,6 +336,13 @@ struct gpu_ops { *get_qctl_whitelist_ranges)(void); int (*get_qctl_whitelist_ranges_count)(void); } regops; + struct { + void (*intr_enable)(struct gk20a *g); + irqreturn_t (*isr_stall)(struct gk20a *g); + irqreturn_t (*isr_nonstall)(struct gk20a *g); + irqreturn_t (*isr_thread_stall)(struct gk20a *g); + irqreturn_t (*isr_thread_nonstall)(struct gk20a *g); + } mc; }; struct gk20a { @@ -734,6 +742,8 @@ gk20a_request_firmware(struct gk20a *g, const char *fw_name); int gk20a_init_gpu_characteristics(struct gk20a *g); +void gk20a_pbus_isr(struct gk20a *g); + int gk20a_user_init(struct platform_device *dev); void gk20a_user_deinit(struct platform_device *dev); -- cgit v1.2.2