From 66f7bcc2f841f43e9bcd2a854361d6783bdb030e Mon Sep 17 00:00:00 2001 From: Tejal Kudav Date: Tue, 21 Aug 2018 12:46:53 +0530 Subject: gpu: nvgpu: Add Top as a unit NVHSCLK registers used by NVLINK IP are part of dev_top hardware headers. This patch adds "Top" as a separate unit and exposes HALs to access dev_top registers. The top unit contains top-level configuration information and any extra registers or features that do not fit into another block's feature set. JIRA NVGPU-1053 JIRA NVGPU-966 Change-Id: Id9a43d4a1c5397959897a242ea97a39a1b95f916 Signed-off-by: Tejal Kudav Reviewed-on: https://git-master.nvidia.com/r/1803632 Reviewed-by: svc-misra-checker GVS: Gerrit_Virtual_Submit Reviewed-by: Vijayakumar Subbu Reviewed-by: mobile promotions Tested-by: mobile promotions --- drivers/gpu/nvgpu/gk20a/gk20a.h | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-) (limited to 'drivers/gpu/nvgpu/gk20a/gk20a.h') diff --git a/drivers/gpu/nvgpu/gk20a/gk20a.h b/drivers/gpu/nvgpu/gk20a/gk20a.h index 03510a16..89a05b3c 100644 --- a/drivers/gpu/nvgpu/gk20a/gk20a.h +++ b/drivers/gpu/nvgpu/gk20a/gk20a.h @@ -1314,7 +1314,12 @@ struct gpu_ops { int (*shutdown)(struct gk20a *g); int (*early_init)(struct gk20a *g); } nvlink; - + struct { + u32 (*get_nvhsclk_ctrl_e_clk_nvl)(struct gk20a *g); + void (*set_nvhsclk_ctrl_e_clk_nvl)(struct gk20a *g, u32 val); + u32 (*get_nvhsclk_ctrl_swap_clk_nvl)(struct gk20a *g); + void (*set_nvhsclk_ctrl_swap_clk_nvl)(struct gk20a *g, u32 val); + } top; void (*semaphore_wakeup)(struct gk20a *g, bool post_events); }; -- cgit v1.2.2