From 59a115f3fe6076de4c9af69de836cc82d6430544 Mon Sep 17 00:00:00 2001 From: Deepak Nibade Date: Wed, 20 Jul 2016 12:39:12 +0530 Subject: gpu: nvgpu: post bpt events after processing We currently post bpt events (bpt.int and bpt.pause) even before we process and clear the interrupts and this could cause races with UMD Fix this by posting bpt events only after we are done processing the interrupts Bug 200209410 Change-Id: Ic3ff7148189fccb796cb6175d6d22ac25a4097fb Signed-off-by: Deepak Nibade Reviewed-on: http://git-master/r/1184109 Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom --- drivers/gpu/nvgpu/gk20a/gk20a.h | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) (limited to 'drivers/gpu/nvgpu/gk20a/gk20a.h') diff --git a/drivers/gpu/nvgpu/gk20a/gk20a.h b/drivers/gpu/nvgpu/gk20a/gk20a.h index 7eb98a2c..6f735af9 100644 --- a/drivers/gpu/nvgpu/gk20a/gk20a.h +++ b/drivers/gpu/nvgpu/gk20a/gk20a.h @@ -264,7 +264,8 @@ struct gpu_ops { bool *early_exit, bool *ignore_debugger); u32 (*mask_hww_warp_esr)(u32 hww_warp_esr); int (*handle_sm_exception)(struct gk20a *g, u32 gpc, u32 tpc, - bool *post_event, struct channel_gk20a *fault_ch); + bool *post_event, struct channel_gk20a *fault_ch, + u32 *hww_global_esr); int (*handle_tex_exception)(struct gk20a *g, u32 gpc, u32 tpc, bool *post_event); void (*create_gr_sysfs)(struct device *dev); -- cgit v1.2.2