From 4728761b6cd002404b9ccd8b318cc9f772962efb Mon Sep 17 00:00:00 2001 From: Seema Khowala Date: Thu, 22 Jun 2017 10:55:40 -0700 Subject: gpu: nvgpu: add get_sm_no_lock_down_hww_global_esr_mask gr ops This is required to take care of t19x changes to support multiple SM JIRA GPUT19X-75 Change-Id: Ifd2cb28ae442462fef1d2c4439baa817f00c2c9e Signed-off-by: Seema Khowala Reviewed-on: https://git-master/r/1514041 GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom --- drivers/gpu/nvgpu/gk20a/gk20a.h | 1 + 1 file changed, 1 insertion(+) (limited to 'drivers/gpu/nvgpu/gk20a/gk20a.h') diff --git a/drivers/gpu/nvgpu/gk20a/gk20a.h b/drivers/gpu/nvgpu/gk20a/gk20a.h index 70b1ac5f..a0a67332 100644 --- a/drivers/gpu/nvgpu/gk20a/gk20a.h +++ b/drivers/gpu/nvgpu/gk20a/gk20a.h @@ -295,6 +295,7 @@ struct gpu_ops { u32 gpc, u32 tpc, u32 sm); u32 (*get_sm_hww_global_esr)(struct gk20a *g, u32 gpc, u32 tpc, u32 sm); + u32 (*get_sm_no_lock_down_hww_global_esr_mask)(struct gk20a *g); void (*get_esr_sm_sel)(struct gk20a *g, u32 gpc, u32 tpc, u32 *esr_sm_sel); int (*handle_sm_exception)(struct gk20a *g, -- cgit v1.2.2