From 1e889871bc0ec3af05280f27497c0e7bd7a023b5 Mon Sep 17 00:00:00 2001 From: Tejal Kudav Date: Fri, 25 May 2018 17:11:14 +0530 Subject: gpu: nvgpu: nvlink: Add HAL for pll setup Before nvlink 2.2, driver was responsible for setting the NVLink clocks during NVLink initialization. For the purpose of security, NVLink PLL handling is moved to Minion in nvlink 2.2 and driver should stop writing to these registers. JIRA NVLINK-167 Change-Id: I18392a29c322da55053037bfde62c8f74ee75288 Signed-off-by: Tejal Kudav Reviewed-on: https://git-master.nvidia.com/r/1730597 Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit Reviewed-by: Bharat Nihalani Reviewed-by: mobile promotions Tested-by: mobile promotions --- drivers/gpu/nvgpu/gk20a/gk20a.h | 1 + 1 file changed, 1 insertion(+) (limited to 'drivers/gpu/nvgpu/gk20a/gk20a.h') diff --git a/drivers/gpu/nvgpu/gk20a/gk20a.h b/drivers/gpu/nvgpu/gk20a/gk20a.h index 9b72f1a7..e29d7b07 100644 --- a/drivers/gpu/nvgpu/gk20a/gk20a.h +++ b/drivers/gpu/nvgpu/gk20a/gk20a.h @@ -1183,6 +1183,7 @@ struct gpu_ops { int (*discover_link)(struct gk20a *g); int (*isr)(struct gk20a *g); int (*rxdet)(struct gk20a *g, u32 link_id); + int (*setup_pll)(struct gk20a *g, unsigned long link_mask); /* API */ int (*link_early_init)(struct gk20a *g, unsigned long mask); u32 (*link_get_mode)(struct gk20a *g, u32 link_id); -- cgit v1.2.2