From 16ad9f537979c5f3717fc5781b1c2fad22a76f96 Mon Sep 17 00:00:00 2001 From: Debarshi Dutta Date: Tue, 26 Jun 2018 15:41:12 +0530 Subject: gpu: nvgpu: move gp106 specific clk_arbiter code into HAL Currently, clock arbiter code is extensively using dgpu specific implementation. This patch restructures the clk_arbiter code and moves gp106 specific code into HAL. Following changes are made in this patch 1) clk_domain_get_f_points is now invoked via HAL for gp106 i.e. g->ops.clk.clk_domain_get_f_points. 2) moved nvgpu_clk_arb_change_vf_point and other related static functions to clk_arb_gp106.c. 3) Instead of only checking if get_arbiter_clk_domain is empty, a check for support_clk_freq_controller is also added. This is to enable the clk_arbiter based on support from both the OS and the chips. Bug 2061372 Change-Id: I65b0a4e02145a86fbbfb420ed591b1fa3c86f6dc Signed-off-by: Debarshi Dutta Reviewed-on: https://git-master.nvidia.com/r/1774279 Reviewed-by: svc-misra-checker GVS: Gerrit_Virtual_Submit Reviewed-by: Deepak Nibade Reviewed-by: Vijayakumar Subbu Reviewed-by: mobile promotions Tested-by: mobile promotions --- drivers/gpu/nvgpu/gk20a/gk20a.h | 7 +++++++ 1 file changed, 7 insertions(+) (limited to 'drivers/gpu/nvgpu/gk20a/gk20a.h') diff --git a/drivers/gpu/nvgpu/gk20a/gk20a.h b/drivers/gpu/nvgpu/gk20a/gk20a.h index ac1226fc..bdf3a168 100644 --- a/drivers/gpu/nvgpu/gk20a/gk20a.h +++ b/drivers/gpu/nvgpu/gk20a/gk20a.h @@ -41,6 +41,7 @@ struct nvgpu_nvhost_dev; struct nvgpu_cpu_time_correlation_sample; struct nvgpu_mem_sgt; struct nvgpu_warpstate; +struct nvgpu_clk_session; struct nvgpu_clk_arb; #ifdef CONFIG_GK20A_CTXSW_TRACE struct nvgpu_gpu_ctxsw_trace_filter; @@ -1083,6 +1084,9 @@ struct gpu_ops { int (*init_clk_support)(struct gk20a *g); int (*suspend_clk_support)(struct gk20a *g); u32 (*get_crystal_clk_hz)(struct gk20a *g); + int (*clk_domain_get_f_points)(struct gk20a *g, + u32 clkapidomain, u32 *pfpointscount, + u16 *pfreqpointsinmhz); unsigned long (*measure_freq)(struct gk20a *g, u32 api_domain); unsigned long (*get_rate)(struct gk20a *g, u32 api_domain); int (*set_rate)(struct gk20a *g, u32 api_domain, unsigned long rate); @@ -1107,15 +1111,18 @@ struct gpu_ops { bool support_lpwr_pg; } clk; struct { + int (*arbiter_clk_init)(struct gk20a *g); u32 (*get_arbiter_clk_domains)(struct gk20a *g); int (*get_arbiter_clk_range)(struct gk20a *g, u32 api_domain, u16 *min_mhz, u16 *max_mhz); int (*get_arbiter_clk_default)(struct gk20a *g, u32 api_domain, u16 *default_mhz); + void (*clk_arb_run_arbiter_cb)(struct nvgpu_clk_arb *arb); /* This function is inherently unsafe to call while * arbiter is running arbiter must be blocked * before calling this function */ int (*get_current_pstate)(struct gk20a *g); + void (*clk_arb_cleanup)(struct nvgpu_clk_arb *arb); } clk_arb; struct { int (*handle_pmu_perf_event)(struct gk20a *g, void *pmu_msg); -- cgit v1.2.2