From 010439ba08891ce97c53c239b5bb8c4a2f5b5f01 Mon Sep 17 00:00:00 2001 From: Vinod G Date: Fri, 27 Apr 2018 09:33:07 -0700 Subject: gpu: nvgpu: add HALs to mmu fault descriptors. mmu fault information for client and gpc differ on various chip. Add separate table for each chip based on that change and add hal functions to access those descriptors. bug 2050564 Change-Id: If15a4757762569d60d4ce1a6a47b8c9a93c11cb0 Signed-off-by: Vinod G Reviewed-on: https://git-master.nvidia.com/r/1704105 Reviewed-by: mobile promotions Tested-by: mobile promotions --- drivers/gpu/nvgpu/gk20a/gk20a.h | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'drivers/gpu/nvgpu/gk20a/gk20a.h') diff --git a/drivers/gpu/nvgpu/gk20a/gk20a.h b/drivers/gpu/nvgpu/gk20a/gk20a.h index e48af08c..2d47f41e 100644 --- a/drivers/gpu/nvgpu/gk20a/gk20a.h +++ b/drivers/gpu/nvgpu/gk20a/gk20a.h @@ -574,6 +574,10 @@ struct gpu_ops { unsigned long engine_ids); void (*get_mmu_fault_info)(struct gk20a *g, u32 mmu_fault_id, struct mmu_fault_info *mmfault); + void (*get_mmu_fault_desc)(struct mmu_fault_info *mmfault); + void (*get_mmu_fault_client_desc)( + struct mmu_fault_info *mmfault); + void (*get_mmu_fault_gpc_desc)(struct mmu_fault_info *mmfault); void (*apply_pb_timeout)(struct gk20a *g); void (*apply_ctxsw_timeout_intr)(struct gk20a *g); int (*wait_engine_idle)(struct gk20a *g); -- cgit v1.2.2