From 2f712e22303471b8dd2f9388c874d12b07aed258 Mon Sep 17 00:00:00 2001 From: Mahantesh Kumbar Date: Wed, 28 Jun 2017 16:23:18 +0530 Subject: gpu: nvgpu: falcon HAL to support SEC2 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit - Updated falcon controller HAL to support SEC2 falcon & used "is_falcon_supported" flag to know the support on chip. - Created falcon HAL “flcn_gp106.c/h” under gp106 to enable support for SEC2 & inherited gk20a flcn support. - Deleted SEC2 falcon related methods to make use of generic flacon controller methods for SEC2. - GP106 SEC2 code cleanup NVPU JIRA-99 Change-Id: I846e8015ed33554b3d8a45795314f1d28eee482f Signed-off-by: Mahantesh Kumbar Reviewed-on: https://git-master/r/1510200 GVS: Gerrit_Virtual_Submit Reviewed-by: Vijayakumar Subbu --- drivers/gpu/nvgpu/gk20a/flcn_gk20a.c | 11 ++++++++--- 1 file changed, 8 insertions(+), 3 deletions(-) (limited to 'drivers/gpu/nvgpu/gk20a/flcn_gk20a.c') diff --git a/drivers/gpu/nvgpu/gk20a/flcn_gk20a.c b/drivers/gpu/nvgpu/gk20a/flcn_gk20a.c index 2a246fdc..328f5bf7 100644 --- a/drivers/gpu/nvgpu/gk20a/flcn_gk20a.c +++ b/drivers/gpu/nvgpu/gk20a/flcn_gk20a.c @@ -269,7 +269,7 @@ static void gk20a_falcon_engine_dependency_ops(struct nvgpu_falcon *flcn) } } -static void gk20a_falcon_ops(struct nvgpu_falcon *flcn) +void gk20a_falcon_ops(struct nvgpu_falcon *flcn) { struct nvgpu_falcon_ops *flcn_ops = &flcn->flcn_ops; @@ -294,6 +294,11 @@ static void gk20a_falcon_hal_sw_init(struct nvgpu_falcon *flcn) flcn->is_falcon_supported = true; flcn->is_interrupt_enabled = true; break; + case FALCON_ID_SEC2: + flcn->flcn_base = FALCON_SEC_BASE; + flcn->is_falcon_supported = false; + flcn->is_interrupt_enabled = false; + break; case FALCON_ID_FECS: flcn->flcn_base = FALCON_FECS_BASE; flcn->is_falcon_supported = true; @@ -314,8 +319,8 @@ static void gk20a_falcon_hal_sw_init(struct nvgpu_falcon *flcn) nvgpu_mutex_init(&flcn->copy_lock); gk20a_falcon_ops(flcn); } else - nvgpu_info(g, "flcn-Id 0x%x not supported on current chip", - flcn->flcn_id); + nvgpu_info(g, "falcon 0x%x not supported on %s", + flcn->flcn_id, g->name); } void gk20a_falcon_init_hal(struct gpu_ops *gops) -- cgit v1.2.2